PM5342 Datasheet, PDF (180/558 Pages) PMC-Sierra, Inc – SONET/SDH Payload Extractor/Aligner

DATA SHEET
PMC-970133
ISSUE 4
PM5342 SPECTRA-155
SONET/SDH PAYLOAD EXTRACTOR/ALIGNER
CRSII:
The CRSII bit is set high when one or more of the maskable interrupt sources
in the Clock Recovery Unit or the Serial to Parallel Converter block has been
activated. This register bit remains high until the interrupt is acknowledged by
reading the CRSI Clock Recovery Control/Status/Interrupt register.
RASEI:
The RASEI bit is set high when one or more of the maskable interrupt
sources in the receive APS and synchronization extractor has been activated.
This register bit remains high until the interrupt is acknowledged by reading
the RASE Interrupt Status Register.
CSPII:
The CSPII bit is set high when one or more of the maskable interrupt sources
in the Clock Synthesis or the Parallel to Serial Converter block has been
activated. This register bit remains high until the interrupt is acknowledged by
reading the CSPI Clock Synthesis Control, Status and Interrupt register.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 158