SAA7120H Datasheet, PDF (9/36 Pages) NXP Semiconductors – Digital video encoder

Philips Semiconductors
Digital video encoder
Product specification
SAA7120H; SAA7121H
7.5 I²C-bus interface
The I²C-bus interface is a standard slave transceiver,
supporting 7-bit slave addresses and 400 kbits/s
guaranteed transfer rate. It uses 8-bit subaddressing with
an auto-increment function. All registers are write only,
except one readable status byte.
The I²C-bus slave address is defined as 88H with pin 21
(SA) tied LOW and as 8CH with pin 21 (SA) tied HIGH.
7.6 Input levels and formats
The SAA7120H; SAA7121H expects digital Y, C_B
and C_R data with levels (digital codes) in accordance
with “CCIR 601”.
For C and CVBS outputs, deviating amplitudes of the
colour difference signals can be compensated by
independent gain control setting, while gain for luminance
is set to predefined values, distinguishable for 7.5 IRE
set-up or without set-up.
Reference levels are measured with a colour bar,
100% white, 100% amplitude and 100% saturation.
Table 1 “CCIR 601” signal component levels
SIGNALS
COLOUR
Y
C_B
C_R
White
235
128
128
Yellow
210
16
146
Cyan
170
166
16
Green
145
54
34
Magenta
106
202
222
Red
81
90
240
Blue
41
240
110
Black
16
128
128
Table 2 8-bit multiplexed format (similar to “CCIR 601”)
TIME
Sample
Luminance pixel number
Colour pixel number
BITS
0
1
2
3
C_B0
Y0
0
C_R0
Y1
1
0
4
5
6
7
C_B2
Y2
2
C_R2
Y3
3
2
2002 Oct 11
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