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SAA7120H Datasheet, PDF (17/36 Pages) NXP Semiconductors – Digital video encoder
Philips Semiconductors
Digital video encoder
Product specification
SAA7120H; SAA7121H
Table 21 Subaddresses 63H to 66H (four bytes to program subcarrier frequency)
DATA BYTE
DESCRIPTION
FSC0 to
FSC3
fsc = subcarrier frequency (in
multiples of line frequency);
fllc = clock frequency (in
multiples of line frequency)
CONDITIONS
FSC
=
round


f-f-l-s-l-cc-
×
232
;
note 1
REMARKS
FSC3 = most significant byte;
FSC0 = least significant byte
Note
1. Examples:
a) NTSC-M: fsc = 227.5, fllc = 1716 → FSC = 569408543 (21F07C1FH).
b) PAL-B/G: fsc = 283.7516, fllc = 1728 → FSC = 705268427 (2A098ACBH).
Table 22 Subaddresses 67H to 6AH
DATA BYTE
DESCRIPTION
L21O0
first byte of captioning data, odd field
L21O1
second byte of captioning data, odd field
L21E0
first byte of extended data, even field
L21E1
second byte of extended data, even field
REMARKS
LSBs of the respective bytes are encoded
immediately after run-in and framing code, the
MSBs of the respective bytes have to carry the
parity bit, in accordance with the definition of
line 21 encoding format
Table 23 Subaddress 6BH
DATA BYTE
PRCV2
ORCV2
CBLF
LOGIC
LEVEL
DESCRIPTION
0 polarity of RCV2 as output is active HIGH, rising edge is taken when input, respectively;
default after reset
1 polarity of RCV2 as output is active LOW, falling edge is taken when input, respectively
0 pin RCV2 is switched to input; default after reset
1 pin RCV2 is switched to output
0 if ORCV2 = HIGH, pin RCV2 provides an HREF signal (horizontal reference pulse that is
defined by RCV2S and RCV2E, also during vertical blanking interval); default after reset
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization only (if TRCV2 = 1); default after reset
1 if ORCV2 = HIGH, pin RCV2 provides a ‘composite-blanking-not’ signal, for example a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking interval,
which is defined by FAL and LAL
PRCV1
ORCV1
TRCV2
SRCV1
if ORCV2 = LOW and bit SYMP = LOW, signal input to RCV2 is used for horizontal
synchronization (if TRCV2 = 1) and as an internal blanking signal
0 polarity of RCV1 as output is active HIGH, rising edge is taken when input; default after reset
1 polarity of RCV1 as output is active LOW, falling edge is taken when input
0 pin RCV1 is switched to input; default after reset
1 pin RCV1 is switched to output
0 horizontal synchronization is taken from RCV1 port (at bit SYMP = LOW) or from decoded
frame sync of “CCIR 656” input (at bit SYMP = HIGH); default after reset
1 horizontal synchronization is taken from RCV2 port (at bit SYMP = LOW)
− defines signal type on pin RCV1; see Table 24
2002 Oct 11
17