SAA7120H Datasheet, PDF (20/36 Pages) NXP Semiconductors – Digital video encoder

Philips Semiconductors
Digital video encoder
Product specification
SAA7120H; SAA7121H
Table 34 Subaddress 75H
DATA BYTE
DESCRIPTION
VS_S
vertical sync shift between RCV1 and RCV2 (switched to
output); in master mode it is possible to shift Hsync (RCV2;
CBLF = 0) against Vsync (RCV1; SRCV1 = 00)
REMARKS
standard value: VS_S = 3
Table 35 Subaddresses 76H, 77H and 7CH
DATA BYTE
DESCRIPTION
TTXOVS
first line of occurrence of signal on pin TTXRQ in odd field
line = (TTXOVS + 4) for M-systems
line = (TTXOVS + 1) for other systems
TTXOVE
last line of occurrence of signal on pin TTXRQ in odd field
line = (TTXOVE + 3) for M-systems
line = TTXOVE for other systems
REMARKS
PAL: TTXOVS = 05H;
NTSC: TTXOVS = 06H
PAL: TTXOVE = 16H;
NTSC: TTXOVE = 10H
Table 36 Subaddresses 78H, 79H and 7CH
DATA BYTE
DESCRIPTION
TTXEVS
first line of occurrence of signal on pin TTXRQ in even field
line = (TTXEVS + 4) for M-systems
line = (TTXEVS + 1) for other systems
TTXEVE
last line of occurrence of signal on pin TTXRQ in even field
line = (TTXEVE + 3) for M-systems
line = TTXEVE for other systems
REMARKS
PAL: TTXEVS = 04H;
NTSC: TTXEVS = 05H
PAL: TTXEVE = 16H;
NTSC: TTXEVE = 10H
Table 37 Subaddresses 7AH to 7CH
DATA BYTE
DESCRIPTION
FAL
first active line: measured in lines; FAL = 0 coincides with the first field synchronization pulse
first active line = (FAL + 4) for M systems
first active line = (FAL + 1) for other systems
LAL
last active line: measured in lines; LAL = 0 coincides with the first field synchronization pulse
last active line = (LAL + 3) for M-systems
last active line = LAL for other systems
Table 38 Subaddress 7CH
DATA BYTE
TTX60
LOGIC LEVEL
0
1
DESCRIPTION
enables NABTS (FISE = 1) or European TTX (FISE = 0); default after reset
enables world standard teletext 60 Hz (FISE = 1)
2002 Oct 11
20