TDA8580J Datasheet, PDF (8/28 Pages) NXP Semiconductors – Multi-purpose power amplifier

Philips Semiconductors
Multi-purpose power amplifier
Preliminary specification
TDA8580J
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
α_cs
∆G_v
V_offset(DC)
channel separation
channel unbalance
DC output offset voltage
V_no
V_no(mute)
V_o(mute)
SVRR
noise output voltage
noise output voltage mute
output voltage mute
supply voltage ripple rejection
P_o = 2 W; f_i = 1 kHz; R_L = 4 Ω
on condition
mute condition; R_L = 4 Ω
R_s = 1 kΩ; V_P = 14.4 V; note 3
note 3
V_i(rms) = 1 V
R_s = 0 Ω; f_i = 1 kHz;
V_ripple(p-p) = 2 V; on or mute
condition
60 65 −
dB
−
−
1
dB
−
0
140 mV
−
10 20 mV
−
100 150 µV
−
0
20 µV
−
3
500 µV
50 60 −
dB
Z_i
CMRR
input impedance
common mode rejection ratio
23 30 37 kΩ
R_s = 0 Ω; V_i(rms) = 0.5 V; f_i = 1 kHz −
60 −
dB
Quad SE application; see Figs 8, 9, 12, 13, 16, 17, 20, 25, 27 and 29
THD
total harmonic distortion
f_i = 1 kHz; P_o = 1 W; R_L = 4 Ω
−
f_i = 10 kHz; P_o = 1 W; R_L = 4 Ω;
−
filter: 22 Hz < f < 30 kHz
0.05 0.1 %
0.2 0.3 %
P_o
output power
G_v
α_cs
∆G_v
V_offset(DC)
voltage gain
channel separation
channel unbalance
DC output offset voltage
V_no
V_no(mute)
V_o(mute)
SVRR
noise output voltage
noise output voltage mute
output voltage mute
supply voltage ripple rejection
Z_i
CMRR
input impedance
common mode rejection ratio
f_i = 1 kHz; P_o = 1 W; V_P = 24 V,
−
R_L = 4 Ω; filter: 22 Hz < f < 30 kHz
0.05 0.1 %
THD = 0.5%; V_P = 14.4 V; R_L = 4 Ω 3.8 4.0 −
W
THD = 0.5%; V_P = 24 V; R_L = 4 Ω 10.5 11.5 −
W
THD = 10%; V_P = 14.4 V; R_L = 4 Ω 4.9 5.2 −
W
THD = 10%; V_P = 24 V; R_L = 4 Ω 14 15 −
W
V_o(rms) = 3 V
25 26 27 dB
P_o = 2 W; f_i = 1 kHz; R_L = 4 Ω
40 46 −
dB
−
−
1
dB
V_P = 14.4 V; on condition
−
0
100 mV
V_P = 14.4 V; mute condition;
R_L = 4 Ω
−
10 20 mV
R_s = 1 kΩ; V_P = 14.4 V; note 3
−
80 120 µV
note 3
−
0
20 µV
V_i(rms) = 1 V
−
3
500 µV
f_i = 1 kHz; V_ripple(p-p) = 2 V, on or
40
45
−
dB
mute condition; R_s = 0 Ω
46 60 74 kΩ
V_i(rms) = 0.5 V; f_i = 1 kHz; R_s = 0 Ω −
60 −
dB
Notes
1. Hysteresis between the rise and fall voltage when pin STANDBY is controlled with low ohmic voltage source.
2. At lower V_P the voltage at the STANDBY pin for on condition will be adjusted automatically to maintain an
on condition at low battery voltage (down to 8 V) when using one-pin operation.
3. The noise output is measured in a bandwidth of 20 Hz to 20 kHz.
2000 Apr 18
8