PSMN006-20K Datasheet, PDF (7/12 Pages) NXP Semiconductors – TrenchMOS ultra low level FET

Philips Semiconductors
PSMN006-20K
TrenchMOS™ ultra low level FET
1
VGS(th)
(V)
0.8
0.6
0.4
03ai71
typ
min
10-1
ID
(A)
10-2
10-3
10-4
03ai70
min
typ
0.2
10-5
0
-80
0
80
160
Tj (°C)
10-6
0
0.2
0.4
0.6
0.8
1
VGS (V)
I_D = 1 mA; V_DS = V_GS
Fig 9. Gate-source threshold voltage as a function of
junction temperature.
T_j = 25 °C; V_DS = 5 V
Fig 10. Sub-threshold drain current as a function of
gate-source voltage.
104
C
(pF)
03ai68
Ciss
103
Coss
Crss
102
10-1
1
10 _{VDS (V)} 102
V_GS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values.
9397 750 09631
Product data
Rev. 01 — 30 May 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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