PDI1394L40 Datasheet, PDF (61/80 Pages) NXP Semiconductors – 1394 enhanced AV link layer controller

Philips Semiconductors
1394 enhanced AV link layer controller
Preliminary specification
PDI1394L40
13.2.13 Isochronous Receiver Control Register (IRXCTL) – Base Address: 0x054
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPD TAG CHANNEL
ERR
SV01845
Reset Value 0x00000000
Bit 17..16:
R
SPD: Speed of last received isochronous packet (S100 .. S400).
00 = 100 Mbps
01 = 200 Mbps
10 = 400 Mbps
11 = Reserved
Bit 15..14:
R/W TAG: Isochronous tag value (must match) for AV format, ‘01’ for IEC 61883 International Standard data.
Bit 7..4:
R
ERR: Error code for last received isochronous AV packet.
Bit 0:
R
SY: Sync code to insert in SY field of isochronous bus packet header. This bit reflects the value of the SY bit
received from the isochronous header and is synchronized in the receiver FIFO with the data payload that was
associated with it. Note: The SY value at the AV port may differ due to aging as it progresses through the IRx FIFO.
Table 7. Error Codes
Code
Name
0000 reserved
0001 complete
0010
through reserved
1100
1101 data_error
1110
and
1111
reserved
Meaning
The node has successfully accepted the packet. If the packet was a request subaction, the destination node has
successfully completed the transaction and no response subaction shall follow.
The node could not accept the block packet because the data field failed the CRC check, or because the length
of the data block payload did not match the length contained in the dataLength field. this code shall not be
returned for any packet that does not have a data block payload.
13.2.14 Isochronous Receiver Memory Status (IRXMEM) – Base Address: 0x058
The AV Receiver Memory Status register reports on the condition of the internal memory buffer used to store outgoing AV data streams after
reception from the 1394 bus. This register is used primarily for diagnostics; several memory flags are also available in the IRXINTACK register.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reset Value 0x00000003
Bit 6:
R
IRXM100LFT: FIFO is 100 quadlets from full.
Bit 5:
R
IRXM256LFT: FIFO is 256 quadlets from full.
Bit 4:
R
IRXM512LFT: FIFO is 512 quadlets from full.
Bit 3:
R
IRXMF: Full: no space available.
Bit 2:
R
IRXMAF: Almost full: exactly one quadlet of storage available.
Bit 1:
R
IRXM5AV: At least 5 more quadlets of storage available.
Bit 0:
R
RXME: Memory bank is empty (no data committed).
SV01057
2000 Dec 15
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