PDI1394L40 Datasheet, PDF (57/80 Pages) NXP Semiconductors – 1394 enhanced AV link layer controller

Philips Semiconductors
1394 enhanced AV link layer controller
Preliminary specification
PDI1394L40
13.2.6 Isochronous Transmitter Control Register (ITXCTL) – Base Address: 0x34
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TAG CHANNEL
SPD
SV01844
Reset Value 0x00000000
Bit 15..14:
R/W Tag: Tag code to insert in isochronous bus packet header. Should be ‘01’ for IEC 61883 International Standard data.
Bit 13..8:
R/W Channel: Isochronous channel number.
Bit 5..4:
R/W Speed: Cable transmission speed (S100, S200, S400).
00 = 100Mbs
01 = 200Mbs
10 = 400Mbs
11 = reserved
Bit 0
R
SY: Sync code to insert in SY field of isochronous bus packet header. This bit reflects the value of the AVx SY pin
and is synchronized with the data payload that was associated with it.
13.2.7 Isochronous Transmitter Memory Status (ITXMEM) – Base Address: 0x038
The AV Transmitter Memory Status register reports on the condition of the internal memory buffer used to store incoming AV data streams
before transmission over the 1394 bus. This register is used primarily for diagnostics; several memory status flags are also available in the
ITXINTACK register.
3130 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SV01056
Reset Value 0x00000003
BIT 6:
R
ITXM100LFT: 100 or less quadlets of storage available.
Bit 5:
R
ITXM256LFT: Memory has 256 quadlets of space remaining before becoming full.
Bit 4:
R
ITXM512LFT: Memory has 512 quadlets of space remaining before becoming full.
Bit 3:
R
ITXMF: memory is completely full, no storage available.
Bit 2:
R
ITXMAF: almost full, exactly one quadlet of storage available.
Bit 1:
R
ITXM5AV: at least 5 more quadlets of storage available.
Bit 0:
R
ITXME: memory bank is empty (zero quadlets stored).
2000 Dec 15
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