SAA7372 Datasheet, PDF (30/60 Pages) NXP Semiconductors – Digital servo processor and Compact Disc decoder CD7

Philips Semiconductors
Digital servo processor and Compact Disc
decoder (CD7)
Product specification
SAA7372
7.15 Microcontroller interface
Communication on the microcontroller interface can be
set-up in two different modes:
1. 4-wire bus mode: protocol compatible with SAA7345
(CD6) and TDA1301 (DSIC2) where:
a) SCL = serial bit clock
b) SDA = serial data
c) RAB = R/W control and data strobe (active HIGH)
for writing to registers 0 to F, reading status bit
selected via register 2 and reading Q-channel
subcode.
d) SILD = R/W control and data strobe (active LOW)
for servo commands.
2. I²C-bus mode: I²C-bus protocol where SAA7372
behaves as slave device, activated by setting
RAB = HIGH and SILD = LOW where:
a) I²C-bus slave address (write mode) = 30H.
b) I²C-bus slave address (read mode) = 31H.
c) Maximum data transfer rate = 400 kbits/s
It should be noted that only servo commands can be used
therefore, writing to registers 0 to F, reading decoder
status and reading Q-channel subcode data must be
performed by servo commands.
7.15.1 MICROPROCESSOR INTERFACE (4-WIRE BUS MODE)
7.15.1.1 Writing data to registers 0 to F
The sixteen 4-bit programmable configuration registers,
0 to F (see Table 12), can be written to via the
microcontroller interface using the protocol shown in
Fig.22.
It should be noted that SILD must be held HIGH; A3 to A0
identifies the register number and D3 to D0 is the data; the
data is latched into the register on the LOW-to-HIGH
transition of RAB.
7.15.1.2 Writing repeated data to registers 0 to F
The same data can be repeated several times (e.g. for a
fade function) by applying extra RAB pulses as shown in
Fig.23. It should be noted that SCL must stay HIGH
between RAB pulses.
7.15.1.3 Reading decoder status information on SDA
There are several internal status signals, selected via
register 2, which can be made available on the SDA line;:
SUBQREADY-I: LOW if new subcode word is ready in
Q-channel register.
MOTSTART1: HIGH if motor is turning at 75% or more
of nominal speed.
MOTSTART2: HIGH if motor is turning at 50% or more
of nominal speed.
MOTSTOP: HIGH if motor is turning at 12% or less of
nominal speed. Can be set to indicate 6% or less
(instead of 12% or less) via register E.
PLL Lock: HIGH if sync coincidence signals are found.
V1: follows input on V1 pin.
V2: follows input on V2 pin.
MOTOR-OV: HIGH if the motor servo output stage
saturates.
FIFO-OV: HIGH if FIFO overflows.
SHOCK: MOTSTART2 + PLL Lock + MOTOR-OV +
FIFO-OV + servo interrupt signal + OTD (HIGH if shock
detected).
LA-SHOCK: latched SHOCK signal.
The status read protocol is shown in Fig.24. It should be
noted that SILD must be held HIGH.
7.15.1.4 Reading Q-channel subcode
To read the Q-channel subcode direct in the 4-wire bus
mode, the SUBQREADY-I signal should be selected as
status signal. The subcode read protocol is illustrated in
Fig.25.
It should be noted that SILD must be held HIGH; after
subcode read starts, the microcontroller may take as long
as it wants to terminate the read operation; when enough
subcode has been read (1 to 96 bits), terminate reading by
pulling RAB LOW.
Alternatively, the Q-channel subcode can be read using a
servo command as follows:
• Use the read high-level status command to monitor the
subcode ready signal.
• Send the read subcode command, and read the
required number of bytes (up to 12).
• Send the read high-level status command; to re-enable
the decoder interface.
7.15.1.5 Behaviour of the SUBQREADY-I signal
When the CRC of the Q-channel word is good, and no
subcode is being read, the SUBQREADY-I status signal
will react as shown in Fig.26. When the CRC is good and
the subcode is being read, the timing in Fig.27 applies.
1998 Feb 26
30