PSMN3R3-80ES Datasheet, PDF (2/14 Pages) NXP Semiconductors – N-channel 80 V, 3.3 mΩ standard level MOSFET in I2PAK

NXP Semiconductors
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
gate
D
drain
S
source
D
drain
PSMN3R3-80ES
N-channel 80 V, 3.3 mΩ standard level MOSFET in I2PAK
Simplified outline
mb
Graphic symbol
D
G
mbb076 S
3. Ordering information
123
SOT226 (I2PAK)
Table 3. Ordering information
Type number
Package
Name
PSMN3R3-80ES
I2PAK
4. Limiting values
Description
plastic single-ended package (I2PAK); TO-262
Version
SOT226
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V_DS
V_DGR
V_GS
I_D
I_DM
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
Conditions
Min
T_j ≥ 25 °C; T_j ≤ 175 °C
-
T_j ≥ 25 °C; T_j ≤ 175 °C; R_GS = 20 kΩ
-
-20
V_GS = 10 V; T_mb = 100 °C; see Figure 1 ^[1] -
V_GS = 10 V; T_mb = 25 °C; see Figure 1
pulsed; t_p ≤ 10 µs; T_mb = 25 °C;
see Figure 3
[1] _-
-
P_tot
total power dissipation
T_mb = 25 °C; see Figure 2
-
T_stg
storage temperature
-55
T_j
junction temperature
-55
T_sld(M)
peak soldering temperature
-
Source-drain diode
I_S
source current
I_SM
peak source current
Avalanche ruggedness
T_mb = 25 °C
pulsed; t_p ≤ 10 µs; T_mb = 25 °C
[1] _-
-
E_DS(AL)S
non-repetitive drain-source
V_GS = 10 V; T_j(init) = 25 °C; I_D = 120 A;
-
avalanche energy
V_sup ≤ 80 V; R_GS = 50 Ω; unclamped
Max Unit
80 V
80 V
20 V
120 A
120 A
830 A
338 W
175 °C
175 °C
260 °C
120 A
830 A
676 mJ
[1] Continuous current is limited by package.
PSMN3R3-80ES
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 31 October 2011
© NXP B.V. 2011. All rights reserved.
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