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BUK762R0-40C_15 Datasheet, PDF (2/15 Pages) NXP Semiconductors – N-channel TrenchMOS standard level FET
NXP Semiconductors
BUK762R0-40C
N-channel TrenchMOS standard level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning
Symbol
G
D
S
D
Description
gate
drain
source
mounting base;
connected to drain
[1] It is not possible to make a connection to pin 2.
3. Ordering information
Simplified outline
mb
[1]
2
13
SOT404 (D2PAK)
Graphic Symbol
D
G
mbb076 S
Table 3. Ordering information
Type number
Package
Name
Description
Version
BUK762R0-40C D2PAK
plastic single-ended surface-mounted package (D2PAK); 3 leads (one lead SOT404
cropped)
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
Min
VDS
drain-source voltage
Tj ≥ 25 °C; Tj ≤ 175 °C
-
VDGR drain-gate voltage
RGS = 20 kΩ
-
VGS
gate-source voltage
ID
drain current
IDM
peak drain current
Tmb = 25 °C; VGS = 10 V; see Figure 1 and 4
Tmb = 100 °C; VGS = 10 V; see Figure 1
Tmb = 25 °C; VGS = 10 V; see Figure 1 and 4
Tmb = 25 °C; tp ≤ 10 μs; duty type pulsed;
see Figure 4
-20
[1] -
[2][3] -
[2][3] -
-
Ptot
total power dissipation Tmb = 25 °C; see Figure 2
-
Tstg
storage temperature
-55
Tj
junction temperature
-55
Avalanche ruggedness
EDS(AL)S non-repetitive
ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω;
-
drain-source avalanche VGS = 10 V; Tj(init) = 25 °C; inductive load type
energy
unclamped inductive load
EDS(AL)R repetitive drain-source
avalanche energy
see Figure 3
[4][5] -
[6][7]
Max
Unit
40
V
40
V
20
V
276
A
100
A
100
A
1104
A
333
W
175
°C
175
°C
1.2
J
-
J
BUK762R0-40C_2
Product data sheet
Rev. 02 — 20 August 2007
© NXP B.V. 2007. All rights reserved.
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