83C145 Datasheet, PDF (19/40 Pages) NXP Semiconductors – Microcontrollers for TV and video MTV

Philips Semiconductors
Microcontrollers for TV and video (MTV)
Product specification
83C145; 83C845
83C055; 87C055
13.6 OSD Special Function Registers
The programming interface to Display RAM is provided by
three Special Function Registers as shown in Tables 15,
17 and 20.
Writing OSAT simply latches the attribute bits into a
register, while writing OSDT causes the data bus
information, plus the contents of the OSAT register, to be
written into display RAM.
Thus, for a given Display RAM location, OSAT should be
written before OSDT. If successive characters are to be
written into Display RAM with the same attributes, OSAT
need not be rewritten for each character, only prior to
writing OSDT for the first character with those particular
attributes.
The OSAT attribute bits associated with the BSpace,
SplitBSpace and New Line characters (see Table 19) are
interpreted differently from those that accompany other
data characters. With BSpace and SplitBSpace, B is
interpreted as described above, but the 3 colour bits
specify the background colour (Bcolor) for subsequent
characters. For BSpace, a change in B and Bcolor
becomes effective at the left edge of the character’s bit
map.
13.6.1 SPECIAL FUNCTION REGISTER OSAD
Table 15 Special Function Register OSAD (On Screen ADdress; address 9AH)
7
6
5
4
3
2
−
OSAD6
OSAD5
OSAD4
OSAD3
OSAD2
1
OSAD1
0
OSAD0
Table 16 Description of OSAD bits
BIT
7
6 to 0
SYMBOL
−
OSAD6 to OSAD0
DESCRIPTION
Reserved.
These 7-bits hold the Display RAM address into which data will be
loaded. OSAD is automatically incremented by one each time OSDT and
Display RAM are written to.
13.6.2 SPECIAL FUNCTION REGISTER OSDT
Writing OSDT causes the data bus information, plus the contents of the OSAT register, to be written into display RAM.
Table 17 Special Function Register OSDT (On Screen DaTa; address 99H)
7
6
5
4
3
2
−
−
OSDT5
OSDT4
OSDT3
OSDT2
1
OSDT1
0
OSDT0
Table 18 Description of OSDT bits
BIT
7 to 6
5 to 0
SYMBOL
−
OSDT5 to OSDT0
DESCRIPTION
Reserved.
Character data; see Table 19. In reality, there is a potential conflict
between the timing of a write to OSDT and an access to display RAM by
the OSD logic for data display. This is resolved by the use of a true
dual-ported RAM for display memory.
1996 Mar 22
19