English
Language : 

83C145 Datasheet, PDF (16/40 Pages) NXP Semiconductors – Microcontrollers for TV and video MTV
Philips Semiconductors
Microcontrollers for TV and video (MTV)
Product specification
83C145; 83C845
83C055; 87C055
13 ON SCREEN DISPLAY (OSD)
Figure 7 shows the OSD block diagram. It shows the CPU
writing into the 128 × 10 display RAM, which is dual-ported
to allow the CPU to write into it at any time, including when
it is being read out by the OSD logic. The 10-bit wide data
coming out of the display RAM is used to access the
appropriate character in the Character Generator memory
(6-bits) and to specify character and display control
functions (4-bits).
Timing for the OSD is controlled by the HSYNC, VSYNC,
and dot clock input VCLK1.
13.1 OSD features
The 83C055 features an advanced OSD function with
some unique features as described in Sections 13.1.1 to
13.1.10.
13.1.1 USER-DEFINABLE DISPLAY FORMAT
The OSD does not restrict the user to a fixed number of
lines with a fixed number of characters per line:
• Using a fixed number of lines restricts the generation of
displays that can be differentiated from others that use
the same chip and places limits on screen content.
• Using a fixed number of characters per line wastes
display RAM if a line has less than the full number of
displayable characters (it has to be padded with
non-visible characters).
The OSD on the 83C055 defines a control character:
• New Line, that has the same function as a Carriage
Return and Line Feed.
When the OSD circuitry fetches this character from display
RAM it stops displaying further characters, waits for the
next horizontal scan line, and starts displaying the next
character in display RAM after the New Line character was
received.
The number of lines is thus up to the user, within the limits
of the display and memory, as are the number of
characters per line. This allows far better control of the
appearance of the OSD.
13.1.3 DUAL-PORTED DISPLAY RAM
The OSD has a true display RAM instead of a character
line buffer. This display RAM is dual-ported to allow
updating the display RAM at any time instead of having to
wait for a vertical retrace.
Vertical Sync (VSYNC) interrupts are supported if
flicker-free updates are required.
13.1.4 PROGRAMMABLE CHARACTER SIZE
• Normal characters are displayed as 18 × 14 bit maps.
• In an interlaced display:
– 2 fields are displayed so that one actually sees a
36 × 14 pixel size character.
– The part has a double height and width mode which
displays 36 × 28 pixel size bit maps per field.
• For use in non-interlaced systems, the part has a double
height mode so that the displayed characters have the
same pixel size (36 × 14) as on an interlaced display.
13.1.5 CHARACTER SHADOWING
When characters are displayed overlaid on a background
of base video, a black border around the characters makes
them highly legible. This feature is called shadowing. The
83C055 has 8 shadowing modes to allow the user to select
various partial shadow modes as well as full surround
shadow; see Fig.8 and Table 28.
13.1.6 PROGRAMMABLE POLARITIES
Inputs to and outputs from the OSD can be programmed
to be recognized as active LOW or HIGH. In conjunction
with the 12 V outputs, this allows direct interfacing to most
video signal processing circuits.
13.1.7 CHARACTER GENERATOR MEMORY IN EPROM
On the 87C055, the Character Generator memory is in
EPROM. This feature allows quick and inexpensive font
development and refinement against the alternative of
creating a masked ROM version to see how the final fonts
will appear.
13.1.2 COLOURS SELECTABLE BY CHARACTER
Characters can be displayed on a background of the base
video or a programmable background colour.
The background colour is selectable by word and the
choice of background (base video/user programmed
colour) by character.
13.1.8 HSYNC LOCKED DOT CLOCK OSCILLATOR
The 83C055 is designed to use an LC oscillator circuit that
is started at the trailing edge of HSYNC and stopped at its
leading edge. In practice, this gives a highly consistent
delay from HSYNC to oscillator start and is stable from
scan line to scan line so that no left margin effects are
seen.
1996 Mar 22
16