SAA5281 Datasheet, PDF (16/48 Pages) NXP Semiconductors – Integrated Video input processor and Teletext decoder IVT1.8

Philips Semiconductors
Integrated Video input processor and
Teletext decoder (IVT1.8*)
Preliminary specification
SAA5281
ON-CHIP MEMORY
Page memory organization
The organization of the page memory is illustrated by Fig.9. The IVT1.8* provides an additional row as compared with
first generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext
page; row 24 is the extra row available for software generated status messages and FLOF/FASTEXT prompt
information.
handbook, full pagewidth
7 characters
for status
7
1
fixed character
written by IVT hardware:
alphanumerics white for normal;
alphanumerics green when looking
for display page
24
24 characters from page header
rolling when display page looked for
8 characters
always rolling
(time)
ROW
8
0
1
2
3
4
MAIN PAGE DISPLAY AREA
5
to
20
21
PACKET X / 22
22
PACKET X / 23
23
PACKET X / 24 STORED HERE IF R0D7 = 1
24
10
14
25
10 bytes for if enabled 14 bytes reserved in
received
chapter 5 for VPS data
page information
MBD789
Fig.9 Basic page memory organization.
REMARK TO Fig.9
Row 0
Row 0 is for the page header. The first seven characters
(0 to 6) are free for status messages. Character 8 is an
alphanumeric white or green control character, written
automatically by IVT1.8* to give a green rolling header
when a page is being looked for. The last eight characters
are for rolling time.
Row 25
The first 10 bytes of row 25 contain control data relating to
the received page as shown in Table 5. The remaining
14 bytes are free for use by the microcomputer.
1996 Nov 04
16