SAA5281 Datasheet, PDF (13/48 Pages) NXP Semiconductors – Integrated Video input processor and Teletext decoder IVT1.8

Philips Semiconductors
Integrated Video input processor and
Teletext decoder (IVT1.8*)
Preliminary specification
SAA5281
handbook, full pagewidth
SDA
t _BUF
t _LOW
SCL
SDA
MBC764
t _HD;STA
tr
t _HD;DAT
t _SU;STA
tf
t _HIGH
t _SU;DAT
t _SU;STO
TIMING CHAIN
Fig.5 I²C-bus timing.
handbook, full pagewidtLhSP
(TCS)
R, G, B, Y
(1)
0 4.66
0
16.67
40 µs
display period
64 µs
56.67 µs
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)
R, G, B, Y
(1)
display period
0
41
(1) Also BLAN in character and box blanking.
Fig.6 Display output timing (a) line rate (b) field rate.
291
312
line numbers
MLA662 - 1
1996 Nov 04
13