SAA2520 Datasheet, PDF (14/36 Pages) NXP Semiconductors – Stereo filter and codec for MPEG layer 1 audio applications

Philips Semiconductors
Stereo filter and codec for MPEG layer 1
audio applications
Preliminary specification
SAA2520
T
t _fL
t _fH
FS256
Tc
t _sH
t _sL
SCL
td
t _h1
SDA, FDAF, FDAC, FSYNC
output
t _su
SWS, SDA, FDAF, FDAC
input
t _h2
MEA644 - 3
Fig.12 Filtered I²S interface timing (slave mode - FS256, SCL and SWS are input).
Notes to Fig.12
t_fH
FS256 HIGH time
t_fL
FS256 LOW time
t_sH
SCL HIGH time
t_sL
SCL LOW time
t_H1
SDA, FDAF, FDAC output
hold after SCL HIGH
t_D
SCL HIGH to SDA, FDAF
FDAC output valid
t_s
SDA, FDAF, FDAC input
valid after SCL HIGH
t_H2
SDA, FDAF, FDAC input
hold after SCL HIGH
≥ 35 ns
≥ 35 ns
≥ T + 35 ns
≥ T + 35 ns
≥ 2T - 15 ns
≤ 3T + 60 ns
≥ 20 ns
≥ T + 20 ns
August 1993
14