TDA8002C Datasheet, PDF (12/28 Pages) NXP Semiconductors – IC card interface

Philips Semiconductors
IC card interface
Product specification
TDA8002C
ACTIVATION SEQUENCE
From Idle mode, the circuit enters the activation mode
when the microcontroller sets the CMDVCC line LOW or
sets the MODE line HIGH when the CMDVCC line is
already LOW. The internal circuitry is then activated, the
internal clock is activated and an activation sequence is
executed. When RST is enabled it becomes the inverse of
RSTIN.
Figures 10 to 12 illustrate the activation sequence as
follows:
1. Step-up converter is started (t₁ ≈ t₀)
2. V_CC rises from 0 to 3 or 5 V (t₂ = t₁ + 1¹â„₂T) (according
to the state on pin CV/TV)
3. I/O, AUX1 and AUX2 are enabled and CLK is enabled
(t₃ = t₁ + 4T); I/O, AUX1 and AUX2 were forced LOW
until this time
4. CLK is set by setting RSTIN to HIGH (t₄)
5. RST is enabled (t₅ = t₁ + 7T); after t₅, RSTIN has no
further action on CLK, but is only controlling RST.
The value of V_CC (5 or 3 V) must be selected by the level
on pin CV/TV before the activation sequence.
handb_Ooo_Sk_C, f_{_}ul_Il_Np_Tag_/6ew₄idth
CMDVCC
VUP
VCC
I/O
CLK
RSTIN
RST
tact
t0
t1
t2
t3
LOW
t5
t4
T = 25 µs
Fig.10 Activation sequence using RSTIN and CMDVCC.
FCE273
1999 Oct 12
12