TDA5360 Datasheet, PDF (10/34 Pages) NXP Semiconductors – Pre-Amplifier for Hard Disk Drive with MR-Read / Inductive Write Heads

Philips Semiconductors
Pre-Amplifier for Hard Disk Drive with
MR-Read / Inductive Write Heads
Objective Specification, Revision 2.2
TDA5360
9.2 Active WRITE mode
Taking RWN low from an Active READ mode selects the Active WRITE mode. The head select inputs, in a serial register,
select the appropriate head.
In write mode the circuit acts as a current switch with write current toggled between the P and N directions of the thin-
film section of the selected head x. The signal polarity is noninverting from WDP, WDN to WPx, WNx.
The write data at pins WDP, WDN could be driven by either a voltage or a current, according to the WVORI bit in Reg.01
(set LOW or HIGH respectively.)
The polarity convention for current mode is :
“positive” => input pin with minimum current flowing
“negative” => input pin with maximum current flowing
The writer terminal voltages are driven to GND during read mode to avoid accidental discharges to the disc.
Note that the write mode CAN NOT be selected directly from a sleep or standby condition.
The steady state value of the write current is programmed in Reg. 04 and is referenced by the external resistor, REXT,
which is connected between the REXT pin and GND. The reference voltage on REXT pin is stable over the entire
operating temperature range and process.
Internal compensation networks are optimized and provided to control the write current shape and settling characteristics
based on specified head loads. The value can be programmed in Reg. 04.
9.3 Active STW mode
In Active Read or Active Write mode, only one head in one preamp is selected.
A special programmation of Reg. 09, using (STWN = LOW) AND (CS0 = CS1 = HIGH) allows the user to either :
- select one head per preamp (if several preamps are adressed at the same time)
- select one head in one preamp when in read mode but two heads in one preamp when going to write mode.
In that case Head x and Head (x+6) will be selected, with x=0...5. Head x is selected via Reg. 00
9.4 STANDBY mode
The standby mode is selected by programming bits MODE0 and MODE1. (see Reg.09)
The internal write current source, and MR bias current source are deactivated while RDP, RDN and FLT outputs are in
a high-impedance state so that they can be OR’d in multiple preamplifiers applications. The device is specially designed
for reduced dissipation in this mode. Response time from Standby to Active Read mode is much shorter than from Sleep
mode to Active Read. The CMM of RDP and RDN is the same as in Sleep or Active mode. (see Note 2)
Internal fault detectors are powered off.
1998 July 30
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