MN103LF66 Datasheet, PDF (90/102 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller

MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
V_DD50 = AV_DD = V_REFH = 2.2 V to 5.5 V
V_SS = 0 V, C_L = 50 pF
Ta = -40 C to +105 C
Parameter
Symbol
Conditions
MIN
Rating
TYP
Unit
MAX
Serial interface 11, at Clock Synchronous, I/O timing 1 (at master (SBT polarity “H”)), refer to Figure:1.6.13
F63 Cycle time
f_{S_CYCLE3}
100
F64 SBT High width
t_{S_HIGH3}
(t_{S_CYCLE3}/2)-5
F65 SBT Low width
t_{S_LOW3}
(t_{S_CYCLE3}/2)-5
F66 SBI/SBO setup time
t_{S_SET3}
10
ns
F67 SBI/SBO hold time
t_{S_HOLD3}
10
F68 SBO output delay
t_{S_OPD3}
31
F69 SBCS setup time
T_{S_CSMST3}
T_{S_CYCLE3}
Serial interface 11, at Clock Synchronous, I/O timing 2 (at slave (SBT polarity “H”)), refer to Figure:1.6.13
F70 Cycle time
f_{S_CYCLE3}
100
F71 SBT High width
t_{S_HIGH3}
45
F72 SBT Low width
t_{S_LOW3}
45
F73 SBI/SBO setup time
t_{S_SET3}
10
ns
F74 SBI/SBO hold time
t_{S_HOLD3}
10
F75 SBO output delay
t_{S_OPD3}
31
F76 SBCS setup time
T_{S_CSSLV3}
T_{S_CYCLE3}/2
Serial interface 11, at Clock Synchronous, I/O timing 3 (at master (SBT polarity “L”)), refer to Figure:1.6.14
F77 Cycle time
f_{S_CYCLE4}
100
F78 SBT High width
t_{S_HIGH4}
(t_{S_CYCLE4}/2)-5
F79 SBT Low width
t_{S_LOW4}
(t_{S_CYCLE4}/2)-5
F80 SBI/SBO setup time
t_{S_SET4}
10
ns
F81 SBI/SBO hold time
t_{S_HOLD4}
10
F82 SBO output delay
t_{S_OPD4}
31
F83 SBCS setup time
T_{S_CSMST4}
T_{S_CYCLE4}
Serial interface 11, at Clock Synchronous, I/O timing 4 (at slave (SBT polarity “L”)), refer to Figure:1.6.14
F84 Cycle time
f_{S_CYCLE4}
100
F85 SBT High width
t_{S_HIGH4}
45
F86 SBT Low width
t_{S_LOW4}
45
F87 SBI/SBO setup time
t_{S_SET4}
10
ns
F88 SBI/SBO hold time
t_{S_HOLD4}
10
F89 SBO output delay
t_{S_OPD4}
31
F90 SBCS setup time
T_{S_CSSLV4}
T_{S_CYCLE4}/2
Publication date: November 2015