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MN103LF66 Datasheet, PDF (85/102 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
Parameter
Symbol
Conditions
IIC signal I/O timing 1 (SCL clock frequency : max 100 kHz) Refer to Figure:1.6.10.
F23
Bus free time
(SDA0-2)
tBUF
F24 Hold time of start condition (SCL0-2) tHD;STA
F25 Clock Low-level pulse width (SCL0-2) tLOW
F26 Clock High-level pulse width (SCL0-2) tHIGH
F27 Setup time of repeat start condition tSU;STA
F28
Hold time of data
(SDA0-2)
At SDA output
tHD;DAT
At SDA input
F29
Setup time of data
(SDA0-2)
tSU;DAT
F30 Setup time of stop condition
tSU;STO
IIC signal I/O timing 2 (SCL clock frequency : max 400 kHz) Refer to Figure:1.6.10.
F31
Bus free time
(SDA0-2)
tBUF
F32 Hold time of start condition (SCL0-2) tHD;STA
F33 Clock Low-level pulse width (SCL0-2) tLOW
F34 Clock High-level pulse width (SCL0-2) tHIGH
F35 Setup time of repeat start condition tSU;STA
F36
Hold time of data
(SDA0-2)
At SDA output
tHD;DAT
At SDA input
F37
Setup time of data
(SDA0-2)
tSU;DAT
F38 Setup time of stop condition
tSU;STO
VDD50 = AVDD = VREFH = 2.2 V to 5.5 V
VSS = 0 V, CL = 50 pF
Ta = -40 C to +105 C
Rating
Unit
MIN
TYP
MAX
4.7
4.0
4.7
s
4.0
4.7
300
0
ns
250
4.0
s
1.3
0.6
1.3
s
0.6
0.6
300
0
ns
100
0.6
s
Publication date: November 2015