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MN103LF66 Datasheet, PDF (71/102 Pages) Panasonic Semiconductor – 32-bit Single-chip Microcontroller
MN103LF66/67/68/69/70/71/72/73/74/75/76/77/78/79 Series
32-bit Single-chip Microcontroller
PubNo. 2347901-012E
VDD50 = AVDD = VREFH = 2.2 V to 5.5 V
VSS = 0 V
Ta = -40 C to +105 C
Parameter
Symbol
Conditions
Rating
MIN
TYP
External clock input OSCI (OSCO is unconnected)
B14 Clock frequency
fOSC VDD50 = 2.2 V to 5.5 V
4
B15 High-level pulse width *9
twh1
20
Figure:1.6.3
B16 Low-level pulse width *9
twl1
20
B17 Rising time *10
B18 Falling time *10
twr1
Figure:1.6.3
twf1
External clock input XI (XO is unconnected)
B19 Clock frequency
fX
VDD50 = 2.2 V to 5.5V
32.768
B20 High-level pulse width *9
twh2
Figure:1.6.4
5
B21 Low-level pulse width *9
twl2
5
B22 Rising time *10
B23 Falling time *10
twr2
Figure:1.6.4
twf2
*9 The clock duty ratio should be 45% to 55%
*10 Rising time and Falling time differ depending on the oscillation frequency.
The MAX value is not a specified value but a rough value.
Consult the oscillator manufacturer and perform matching tests enough for determining appropriate value.
Unit
MAX
20
MHz
ns
2.5
2.5
kHz
s
0.5
0.5
Publication date: November 2015