SAA1305T Datasheet, PDF (6/32 Pages) Panasonic Semiconductor – On/off logic IC

Philips Semiconductors
On/off logic IC
Product specification
SAA1305T
handbook, full pagewidth
RES = HIGH
RESET
RES = LOW
SAA1305T
OPERABLE
I²C-bus error counter = 5
Watchdog timer error counter = 5
RUN
entry⁽¹⁾
event⁽²⁾
event⁽³⁾; CHI
control register bit 0
STANDBY
entry⁽⁴⁾
event⁽⁵⁾
VL timer start
VL timer end
input D0 = logic 1
oscillator fault
WAIT
entry⁽⁶⁾
event⁽⁵⁾
MGR202
(1) See Section “Run mode entries”.
(2) See Section “Run mode events”.
(3) Possible events are: alterations on any of the inputs D0 to D7, an impedance detection, an alarm timer event and an oscillator fault.
(4) See Section “Standby mode entries”.
(5) Not available.
(6) See Section “Wait mode entries”.
Fig.3 State diagram for IC modes.
RUN MODE ENTRIES
• Reset Watchdog timer error counter
• Enable Watchdog timer
• Enable V_L timer function
• Generate reset pulse
• Disable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
• Reset I²C-bus interface
• Set pin CHI to LOW (LOW = active)
• Set pin ON/OFF to HIGH (ON is active).
RUN MODE EVENTS
• I²C-bus read and write commands
• Watchdog timer reset
• Missed I²C-bus communication after a (CHI) change
information signal
• Oscillator fault.
WAIT MODE ENTRIES
• Disable Watchdog timer
• Reset I²C-bus error counter
• Reset Watchdog timer error counter
• Start V_L timer
• Set pin CHI in 3-state
• Set pin ON/OFF to LOW (OFF is active).
STANDBY MODE ENTRIES
• Disable Watchdog timer
• Reset Watchdog timer error counter
• Reset I²C-bus error counter
• Disable V_L timer function
• Enable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
• Set pin ON/OFF to LOW (OFF is active)
• Set pin CHI in 3-state.
2004 Jan 15
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