SAA1305T Datasheet, PDF (12/32 Pages) Panasonic Semiconductor – On/off logic IC

Philips Semiconductors
On/off logic IC
Product specification
SAA1305T
Table 5 Definition of the status register bits
BIT
DESCRIPTION
7
a logic 1 indicates a change on any of the inputs D7 to D0
6
a logic 1 indicates a ¹â„₂V_DD on input D1 (impedance detection)
5
a logic 1 indicates a reset after an oscillator fault
4
a logic 1 indicates a reset caused by a missed I²C-bus communication after a change information signal
(no communication between two Watchdog timer trigger pulses)
3
a logic 1 indicates a timer alarm
2
a logic 1 indicates a V_L timer reset
1
a logic 1 indicates a device reset (via pin RES)
0
a logic 1 indicates a Watchdog timer reset
Table 6 Definition of the old and new register bits
BIT
7
data of input D7
6
data of input D6
5
data of input D5
4
data of input D4
3
data of input D3
2
data of input D2
1
data of input D1
0
data of input D0
DESCRIPTION
Table 7 Definition of the watch and alarm register bits (read mode); note 1
ADDRESS
(HEX)
2
3
4
5
6
7
DATA BITS
4 to 0
5 to 0
5 to 0
4 to 0
5 to 0
5 to 0
DESCRIPTION
hours of alarm
minutes of alarm
seconds of alarm
hours of watch
minutes of watch
seconds of watch
VALUES
0 to 31
0 to 63
0 to 63
0 to 23
0 to 59
0 to 59
DEFAULT
31
63
63
0
0
0
Note
1. The alarm is disabled by writing a time larger than 24:00:00. With the default values the alarm function is disabled.
2004 Jan 15
12