SAA1305T Datasheet, PDF (10/32 Pages) Panasonic Semiconductor – On/off logic IC

Philips Semiconductors
On/off logic IC
Product specification
SAA1305T
Power-on or system reset
The reset input (pin RES) is of the CMOS input levels type.
During a LOW level on pin RES the outputs are as shown
in Table 3 for RES = LOW.
After the system reset (rising edge on pin RES) all internal
registers are in a defined condition (see Table 4) and the
outputs are as shown in Table 3 for RES = HIGH.
Table 3 Logic levels for the reset input and oscillator failure
PIN
RP
ON/OFF
LED
SDA
CHI
RES = LOW
HIGH
LOW
LOW
3-state
3-state
RES = HIGH
HIGH (voltage on V_DD)
3-state [after a defined time (maximum reset time)]
HIGH
LOW
3-state (receiving mode if RP = LOW)
LOW (information for microcontroller)
OSCILLATOR FAILURE
3-state
LOW
LOW
3-state
LOW
Table 4 Defined condition after reset for the registers; RES = HIGH
REGISTER
CONTENTS
Status register
02 (HEX)
New register
all input latches are enabled
Old register
same levels as corresponding inputs during falling edge on pin RES
Control register 03 (HEX)
LED register
04 (HEX)
Alarm register
FFFF (HEX); see Table 7
Watch register
0000 (HEX)
Impedance register 03 (HEX)
2004 Jan 15
10