MN85571AC Datasheet, PDF (6/16 Pages) Panasonic Semiconductor – Single-Chip Audio/Video MPEG2 Encoder

MN85571AC
s Signal and Control Timing
• Signal Overview
The MN85571AC I/O signals can be classified by function as shown below.
See the Pin Descriptions section for details on these signals.
All signal pins conform to the LVTTL standard.
Clock
Control
Video I/F
SCLK
NRST
TRST
BUSY
VCLK
VIN[7:0]
Host I/F
HA[3:0]
HD[15:0]
NHCS
NHRE
NHWE
NHINT
DMACLK
NHDACK
NHDREQ
Audio I/F
ADIN
PCKI
PCKO
BCKIO
LRCKIO
AMAS
208-pin
RMRS
RCLKI
RCLKO
CDO[7:0]
CDREADY
CDACK
IPIC
VOB
HCIFZ
MCLK
MCLKIN
MCKE
NMCS
NMRAS
NMCAS
NMWE
MDQM
MA[13:0]
MDQ[31:0]
AGND
AVDD
(For 3.3 V PLL)
GND
1.8V-VDD
3.3V-VDD
Code I/F
SDRAM I/F
Power
6
SDD00023AEM