MN85571AC Datasheet, PDF (12/16 Pages) Panasonic Semiconductor – Single-Chip Audio/Video MPEG2 Encoder

MN85571AC
s Interfaces (continued)
1. Host interface (continued)
2) Indirect addressing access
[Read]
(1) The indirect address value is written to INADR0 (HA[3:0] = $6). This sets the indirect address.
(2) Data is read from INDAT0 (HA[3:0] = $8). At this time the data at the address set in INADR0 is read out over
this device's internal bus, although it appears to be read out from INDAT0. This completes the read operation.
At the same time, the value stored in INADR0 is automatically incremented (auto increment).
HA[3:0]
Write to INADR0
HA[3:0] = $6
Read from INDAT0
HA[3:0] = $8
NHCS
NHWE
NHRE
HD[15:0]
Address
Read Data
The value in INADR0 is incremented
and now points to <address + 1>.
[Write]
(1) The indirect address value is written to INADR0 (HA[3:0] = $6). This sets the indirect address. (Since writes
are performed in 32-bit units, the set indirect address must be an even value.)
(2) Data is written to INDAT0 (HA[3:0] = $8). This latches the lower 16 bits of the data.
(3) Another data is written to INDAT0 (HA[3:0] = $8). This, in conjunction with the 16 bits of data acquired in
step (2) above, forms a 32-bit data unit, which is then written over the internal data bus. At the same time, the
value stored in INADR0 is automatically incremented by 2 (auto increment).
HA[3:0]
NHCS
NHWE
NHRE
HD[15:0]
Write to INADR0
HA[3:0] = $6
Address
Write to INADR0
HA[3:0] = $8
"H"
Data[15:0]
Write to INADR0
HA[3:0] = $8
Data[31:16]
The data (Data[31:0]) is written and
INADR0 is incremented by 2. INADR0
now points to <address + 2>.
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