MN85571AC Datasheet, PDF (2/16 Pages) Panasonic Semiconductor – Single-Chip Audio/Video MPEG2 Encoder

MN85571AC
s Block Diagram
The MN85571AC consists of the 5 blocks listed below.
1. Video encoder block. This block is based on the MN85560 MPEG2 video encoder, but provides additional
functionality as well.
2. Audio encoder block. This block is based on the MN67735JA Dolby Digital encoder core.
3. Multiplexer block. This block multiplexes the encoded video and audio data.
4. SDRAM interface block (MIF). This block handles data exchange with external SDRAM.
5. Host interface block (HIF). This block handles data exchange with and accepts control commands from an exter-
nal host.
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4. MIF
ADIN
PCKI
PCKO
LRCKIO
BCKIO
AMAS
SCLK
(27 MHz)
2. Audio encoder
block
DSP
36 MHz
PLL
108 MHz
ASF
CBUS
ABUS
VIN ⁸
VCLK
(27 MHz)
1. Video encoder block
ERISC
Startup
3. Multiplexer 8
block
CIF
SYSENC
CDO
RMRS
HCIFZ
RCLKO
RCLKI
CDACK
CDREADY
IPIC
VOB
SRISC DIF
Startup
5. HIF
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Note) The MN85571AC includes two RISC microcontrollers (for video encoding and data multiplexing) and one DSP for audio
encoding. The microcode for these two RISC microcontrollers must be downloaded to the on-chip instruction memory before
the MN85571AC is used. The DSP microcode is stored in on-chip ROM, and does not need to be downloaded.
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SDD00023AEM