OX12PCI840 Datasheet, PDF (24/33 Pages) List of Unclassifed Manufacturers – Integrated Parallel Port and PCI interface

OXFORD SEMICONDUCTOR LTD.
Bits Description
15 ‘0’ = This is the last configuration WORD in for
the selected function in the Function-Header.
‘1’ = There is another WORD to follow for this
function.
14:8 These seven bits define the byte-offset of the PCI
configuration register to be programmed. For
example the byte-offset of the Interrupt Pin
register is 0x3D. Offset values are tabulated in
section 4.2.
7:0 8-bit value of the register to be programmed
Table 11: Zone 3 data format (data)
Table 12 shows which PCI Configuration registers are
writable from the EEPROM for each function.
Offset Bits Description
0x02 7:0 Device ID bits 7 to 0.
0x03 7:0 Device ID bits 15 to 8.
0x06 3:0 Must be ‘0000’.
0x06 4 Extended Capabilities.
0x06 7:5 Must be ‘000’.
0x09 7:0 Class Code bits 7 to 0.
0x0A 7:0 Class Code bits 15 to 8.
0x0B 7:0 Class Code bits 23 to 16.
0x2E 7:0 Subsystem ID bits 7 to 0.
0x2F 7:0 Subsystem ID bits 15 to 8.
0x3D 7:0 Interrupt pin.
0x42 7:0 Power Management Capabilities
bits 7 to 0.
0x43 7:0 Power Management Capabilities
bits 15 to 8.
Table 12: EEPROM-writable PCI configuration registers
OX12PCI840
DS-0021 Jun 05
Page 24