SCY99091FCT2G Datasheet, PDF (7/26 Pages) ON Semiconductor – Voltage Detector Series with Programmable Delay

V_DET+ + 2.0 V
Input Voltage,
Pin 2
0.7 V
GND
V_DET+ + 2.0 V
NCP302, NCP303
NCP302L
V_DET+ + 2.0 V
0.7 V
GND
5.0 V
NCP303L
Reset Output
Voltage, Pin 1
V_DET+ + 2.0 V
2
2.5 V
GND
t_D1
t_D2
GND
t_D1
t_D2
NCP302 and NCP303 series are measured with a 10 pF capacitive load. NCP303 has an additional 470 k pullup resistor
connected from the reset output to +5.0 V. The reset output voltage waveforms are shown for the active low ‘L’ devices. Output
time delay t_D1 and t_D2 are dependent upon the delay capacitance. Refer to Figures 30, 31, and 32. The upper detector
threshold, V_DET+ is the sum of the lower detector threshold, V_DET− plus the input hysteresis, V_HYS.
Figure 2. Measurement Conditions for t_D1 and t_D2
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