SCY99091FCT2G Datasheet, PDF (1/26 Pages) ON Semiconductor – Voltage Detector Series with Programmable Delay

NCP302, NCP303
Voltage Detector Series
with Programmable Delay
The NCP302 and NCP303 series are second generation ultra−low
current voltage detectors that contain a programmable time delay
generator. These devices are specifically designed for use as reset
controllers in portable microprocessor based systems where extended
battery life is paramount.
Each series features a highly accurate undervoltage detector with
hysteresis and an externally programmable time delay generator. This
combination of features prevents erratic system reset operation.
The NCP302 series consists of complementary output devices that
are available with either an active high or active low reset. The
NCP303 series has an open drain N−Channel output with an active low
reset output.
5
1
http://onsemi.com
MARKING
DIAGRAM
TSOP−5/
SOT23−5
CASE 483
5
xxx AYWG
G
1
Features
• Quiescent Current of 0.5 mA Typical
• High Accuracy Undervoltage Threshold of 2.0%
• Externally Programmable Time Delay Generator
• Wide Operating Voltage Range of 0.8 V to 10 V
• Complementary or Open Drain Output
• Active Low or Active High Reset
• Specified Over the −40°C to +125°C Temperature Range
(Except for Voltage Options from 0.9 to 1.1 V)
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Microprocessor Reset Controller
• Low Battery Detection
• Power Fail Indicator
• Battery Backup Detection
xxx = Specific Device Code
A
= Assembly Location
Y
= Year
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Reset
Output
1
Input ²
5 C_D
Ground ³
4 N.C.
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 22 of this data sheet.
NCP302xSNxxT1
Complementary Output Configuration
2 Input
NCP303LSNxxT1
Open Drain Output Configuration
2 Input
1 Reset Output
R_D
1
*
Reset
V_ref
Output
R_D
V_ref
3 GND 5 C_D
* Inverter for active low devices.
* Buffer for active high devices.
3 GND 5 C_D
This device contains 28 active transistors.
Figure 1. Representative Block Diagrams
© Semiconductor Components Industries, LLC, 2013
1
May, 2013 − Rev. 25
Publication Order Number:
NCP302/D