AMIS-30623 Datasheet, PDF (51/65 Pages) AMI SEMICONDUCTOR – LIN Microstepping Motordriver

AMIS-30623
GetFullStatus
This command is provided to the circuit by the LIN master to get a complete status of the circuit and the stepper-motor. Refer to RAM
Registers and Flags Table to see the meaning of the parameters sent to the LIN master.
Note: A GetFullStatus command will attempt to reset flags <TW>, <TSD>, <UV2>, <ElDef>, <StepLoss>, <CPFail>, <OVC1>,
<OVC2> and <VddReset>.
GetFullStatus corresponds to 2 successive LIN in-frame responses with 0x3D indirect ID.
Byte Content
0
Identifier
1
Data 1
2
Data 1
Bit 7
*
1
1
Bit 6
*
Preparing Frame
Structure
Bit 5 Bit 4 Bit 3 Bit 2
0
ID4 ID3 ID2
CMD[6:0] = 0x01
AD[6:0]
Bit 1
ID1
Bit 0
ID0
Byte
0
1
2
3
4
5
6
7
8
Content
Identifier
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Reading Frame 1
Structure
Bit 7
Bit 6
Bit 5 Bit 4 Bit 3
0
1
1
1
1
1
AD[6:0]
Irun[3:0]
Vmax[3:0]
AccShape StepMode[1:0] Shaft
VddReset StepLoss ElDef
UV2
TSD
Motion[2:0]
ESW OVC1
0
0
0
0 TimeE
AbsThr[3:0]
Bit 2
1
Bit 1
0
Bit 0
1
Ihold[3:0]
Vmin[3:0]
Acc[3:0]
TW
Tinfo[1:0]
OVC2 Stall CPFail
DataE HeadE BitE
DelThr[3:0]
Reading Frame 2
Byte Content
Structure
Bit 7
Bit 6
Bit 5
Bit 4 Bit 3 Bit 2 Bit 1
Bit 0
0
Identifier
0
1
1
1
1
1
0
1
1
Data 1
1
AD[6:0]
2
Data 2
ActPos[15:8]
3
Data 3
ActPos[7:0]
4
Data 4
TagPos[15:8]
5
Data 5
TagPos[7:0]
6
Data 6
SecPos[7:0]
7
Data 7
MinZCross[2:0]
1 DC100
SecPos[10:8]
8
Data 8
AbsStall DelStallLo DelStallHi
MinSamples[2:0]
DC100StEn PWMJEn
Where:
(*)
According to parity computation
Important: it is not mandatory for the LIN master to initiate the second in-frame response if ActPos, TagPos and SecPos are not
needed by the application.
GetOTPparam
This command is provided to the circuit by the LIN master after a preparation frame (see Preparing frames) was issued, to read the
content of an OTP memory segment which address was specified in the preparation frame.
GetOTPparam corresponds to a LIN in-frame response with 0x3D indirect ID.
Byte
0
1
Content
Identifier
Data 1
Bit 7
*
1
Preparing Frame
Structure
Bit 6 Bit 5 Bit 4 Bit 3
*
0
ID4 ID3
Bit 2
ID2
CMD[6:0] = 0x02
Bit 1
ID1
Bit 0
ID0
Rev. 4 | Page 51 of 65 | www.onsemi.com