Q32M210 Datasheet, PDF (4/50 Pages) ON Semiconductor – Precision Mixed-Signal 32-bit Microcontroller SPI/SQI interface.

Q32M210
FUNCTIONAL OVERVIEW
Operating Modes
Three low−power operating modes are available
1. Run mode – used during normal program
execution; the entire device is fully operational in
run mode
2. Standby mode – used for lower current
consumption, with paused program execution and
fast wakeup
3. Sleep mode – used for ultra low current
consumption, with no program execution and
restart after wakeup
Each mode is designed to provide the lowest possible
current consumption, while maintaining power to specific
parts of the device.
Run Mode
Run mode provides a low power mode where the entire
system is fully functional. In run mode, the device enables
the on−chip VDDD Digital Supply Regulator to provide
power to the ARM Cortex−M3 Processor. The processor is
clocked from either an internal or an external clock source.
The program can be executed from the internal flash or
SRAM.
The application can selectively enable or disable sensor
interface components, including supply regulators and
references, as required. The application may also adjust the
device clock frequency through the internal oscillator or
through clock divisors to minimize power consumption. The
digital and analog interfaces may be configured as required
in run mode. Internal clock dividers provide all the
necessary clocks to the sensor interface and peripherals.
While in run mode, the application may switch into either
sleep mode or standby mode.
Standby Mode
Standby mode provides a low power mode where the
digital system state is retained. In standby mode, the ARM
Cortex−M3 Processor execution is paused. The VDDD
Digital Supply Regulator voltage is reduced. The contents of
all the registers and SRAM are retained.
The power supervisor automatically disables and powers
down the sensor interface components, including the analog
supply regulators and references. The application may
selectively enable or disable the RTC, RTC alarm, and the
Wakeup controller. The internal oscillator is automatically
disabled.
When in standby mode, the device may be switched into
run mode by either the RTC alarm or by up to four external
events (through the Wakeup controller).
Sleep Mode
Sleep mode provides an ultra−low power mode where the
system is waiting for a wakeup event. In sleep mode, the
power supervisor automatically disables and powers down
the digital and analog supply regulators, the internal
oscillator, and all the sensor interface components. The
application may selectively enable or disable the RTC, RTC
alarm, and the Wakeup controller.
When in sleep mode, the device may be switched into run
mode by either the RTC alarm or by up to four external
events (through the Wakeup controller). After exiting sleep
mode, the system state is reset and execution starts from the
beginning of the ROM program.
A general purpose retention register is available to store
state. The retention register contents are retained after
exiting sleep mode. This register may be used by the
application to quickly restore its state.
Power Supply
The device can powered from a single battery supply such
as a 2032 lithium coin cell. The device supplies all required
regulated voltages and references on−chip. This allows the
device to operate directly from a single battery supply
without the need for external regulators or switches.
VBAT and VBATA
The main power supply input for the device is VBAT. The
supplied voltage to VBAT is typically 3.3 V but it can be
supplied with any voltage between 1.8 V and 3.6 V. The
device will operate reliably across this entire power supply
range. This flexibility allows for a wide range of battery
types to be directly connected to the device.
The sensor interface power supply for the device is
VBATA. VBATA is typically 3.3 V but it can be supplied
with any voltage between 1.8 V and 3.6 V. The sensor
interface will operate reliably across this entire power
supply range however the performance of the sensor
interface may be reduced when VBATA drops below 2.2 V.
VBATA also powers the IF5 pins.
In a typical application, VBATA and VBAT are both
connected directly to the battery supply. To increase the
useful operating life of the battery VBATA may be
externally connected to the on−chip charge pump output
(VDBL) instead of the battery. In this configuration the
sensor interface power supply remains nominally 3.5 V
even as the battery voltage drops.
VBAT is monitored by the built−in power supervisor.
VBATA is not directly monitored but may be measured
through the sensor interface.
Regulators
All required voltages for normal device operation are
generated on−chip.
VDDD
The VDDD Digital Supply Regulator (VDDD) provides
a nominal 1.8 V power supply for the ARM Cortex−M3
Processor, digital peripheral and memories, including the
on−chip flash. VDDD is generated on−chip and is connected
to the digital components internally. It is also available
externally. Flash memory reads and writes require only a
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