English
Language : 

AMIS-49587_P2 Datasheet, PDF (38/55 Pages) ON Semiconductor – Power Line Carrier Modem
AMIS--49587
7.3.2 WriteConfig_Request
External CPU
AMIS4958x
Command
Interpreter
WriteConfigNew_Request(0x71)
[Config data error| Command not allowed| Test mode]
WriteConfigNew_Error (0x73)
On success,
mode is changed
to Master, Slave
or Spy
[Config data OK&& Command allowed&& !Test mode]
WriteConfigNew_Confirm (0x72)
Figure 32. Sequence Diagram for WriteConfig_Request
Command can be issued at any time (If the status message allows it to be send) and will bring the MODEM in a ‘SET’ state
if the configuration data is correct. Depending on the configuration data, the final state of the MODEM will be Master, Slave
or Monitor.
<STX> 0x26 (Length)
0x71 (WriteConfig_Request)
Data_Config
CHK
With Data_Config, 36 bytes of configuration data as laid out in Tables 41 and 43.
Table 41. CONFIGURATION PARAMETERS
Field
Length
First Initiator MAC Address (FIMA)
2 bytes
Last Initiator MAC Address (LIMA)
2 bytes
Local MAC Address
2 bytes
Active Initiator Address
Time--out--synchro--confirm
Time--out--frame--not--ok
Time--out--not--addressed
Mac--group--addresses
Fs
Fm
R_ZC_ADJUST
2 bytes
2 bytes
2 bytes
2 bytes
10 bytes
2 bytes
2 bytes
1 byte
Value
0001 to 0FFF
XXXX
0001 to 0FFF
XXXX
0FFE or
0001 to (FIMA--1)
FIMA to LIMA
XXXX
0000
FIMA to LIMA
XXXX
0000 to FFFF
0000 to FFFF
0000 to FFFF
XXXX
0000 to 0FFF
0000 to FFFF
0000 to FFFF
00 to FF
Description
Slave: First value for Initiator MAC address
Master & Monitor: don’t care
Slave: Last value for Initiator MAC address
Master & Monitor: don’t care
Slave Mode: New
Slave (Registered)
Master
Monitor
Master, Slave (unlocked)
Slave (locked on an initiator)
Monitor
Slave: In seconds. (Not used in Master mode)
Slave: In seconds (Not used in Master mode)
Slave: In minutes (Not used in Master & Monitor mode)
Monitor: Don’t care
Slave: 5 MAC group addresses (Not used in Master
mode)
Step Register for the Space Frequency Fs
Step Register for the Mark Frequency Fm
Value according to the voltage level of the 50 Hz
information for the input of the PLL.
http://onsemi.com
38