AMIS-49587_P2 Datasheet, PDF (11/55 Pages) ON Semiconductor – Power Line Carrier Modem

AMIS--49587
4 ELECTRICAL CHARACTERISTICS
4.1 DC AND AC CHARACTERISTICS
4.1.1 Oscillator: Pin XIN, XOUT
In production the actual oscillation of the oscillator and duty cycle will not be tested. The production test will be based on the
static parameters and the inversion from XIN to XOUT in order to guarantee the functionality of the oscillator.
Table 8. OSCILLATOR
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Crystal frequency
Duty cycle with quartz connected
(Note 1)
(Note 1)
f_CLK
--100 ppm 24 +100 ppm MHz
40
60
%
Start--up time
Maximum Capacitive load on XOUT
Low input threshold voltage
High input threshold voltage
Low output voltage
(Note 1)
XIN used as clock input
XIN used as clock input
XIN used as clock input
XIN used as clock input,
XOUT = 2 mA
T_startup
CL_XOUT
VIL_XOUT
VIH_XOUT
VOL_XOUT
0.3 V_DD
50
ms
50
pF
V
0.7 V_DD
V
0.3
V
High input voltage
XIN used as clock input
VOH_XOUT
1. Guaranteed by design. Maximum allowed series loss resistance up to 80 Ω.
V_DD--0.3
V
4.1.2 Zero Crossing Detector and 50/60 Hz PLL: Pin M50HZ_IN
Table 9. ZERO CROSSING DETECTOR AND 50/60 Hz PLL
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Maximum peak input current
Maximum average input current
Mains voltage (ms) range
During 1 ms
With protection resistor at
M50HZIN
Imp_M50HZIN
--20
Imavg_M50HZIN
--2
V_MAINS
90
20
mA
2
mA
550
V
Rising threshold level
Falling threshold level
Hysteresis
Lock range for 50 Hz (Note 3)
Lock range for 60 Hz (Note 3)
Lock time (Note 3)
Lock time (Note 3)
Frequency variation without going out of
lock (Note 3)
(Note 2)
(Note 2)
(Note 2)
MAINS_FREQ = 0 (50 Hz)
MAINS_FREQ = 0 (60 Hz)
MAINS_FREQ = 0 (50 Hz)
MAINS_FREQ = 0 (60 Hz)
MAINS_FREQ = 0 (50 Hz)
VIRM_50HZIN
VIFM_50HZIN
0.9
VHY_50HZIN
0.4
Flock_50Hz
45
Flock_60Hz
54
Tlock_50Hz
Tlock_60Hz
DF_60Hz
1.9
V
V
V
55
Hz
66
Hz
15
s
20
s
0.1
Hz/s
Frequency variation without going out of MAINS_FREQ = 0 (60 Hz)
lock (Note 3)
DF_50Hz
0.1
Hz/s
Jitter of CHIP_CLK (Note 3)
Jitter_{CHIP_CLK} --25
25
ms
2. Measured relative to V_SS.
3. These parameters will not be measured in production since the performance is totally dependent of a digital circuit which will be guaranteed
by the digital test patterns.
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