AMIS-49587_P2 Datasheet, PDF (22/55 Pages) ON Semiconductor – Power Line Carrier Modem

AMIS--49587
6.2 TRANSMITTER PATH DESCRIPTION (S--FSK
MODULATOR)
For the generation of the space and mark frequencies, the
direct digital synthesis (DDS) of the sine wave signals is
performed under the control of the microprocessor. After a
signal conditioning step, a digital to analog conversion is
performed. As for the receive path, a sigma delta
modulation technique is used. In the analog domain, the
signal is low pass filtered, in order to remove the high
frequency quantization noise, and passed to the automatic
level controller (ACL) block, where the level of the
transmitted signal can be adjusted. The determination of the
signal level is done through the sense circuitry.
TX_EN
ALC_IN
TX_OUT
Transmitter (S--FSK Modulator)
ALC
control
LP
Filter
D/A
Transmit Data
& Sine Synthesizer
ARM
Interface
&
Control
fMI f MQ fSI fSQ
TO RECEIVER
Figure 17. Transmitter Block Diagram
6.2.1 ARM Interface and Control
The interface with the ARM consists in a 8--bit data
registers R_TX_DATA, 2 control registers R_TX_CTRL
and R_ALC_CTRL, a flag TX_RXB defining transmit and
receive and 2 16--bit wide frequency step registers R_FM
and R_FS defining f_M (mark frequency = data 1) and f_S
(space frequency = data 0). All these registers are memory
mapped. Some of them are for internal use only and cannot
be accessed by the user.
The processing of the physical frame (preamble, MAC
address, CRC) is done by the ARM.
6.2.2 Sine Wave Generator
A sine wave is generated with a direct digital synthesizer
DDS. The synthesizer generates in transmission mode a sine
wave either for the space frequency (f_S, data 0) or for the
mark frequency (f_M, data1). In reception the synthesizer
generates the sine and cosine waves for the mixing process,
f_SI, f_SQ, f_MI, f_MQ (space and mark signals in phase and
quadrature). The space and mark frequencies are defined in
an individual step 16 bit wide register.
Table 24. FS AND FM STEP REGISTERS
ARM
Register
R_FS[15:0]
R_FM[15:0]
Hard
Reset
0000h
0000h
Soft
Reset
0000h
0000h
Description
Step register for the
space frequency f_S
Step register for the
mark frequency f_M
The space and mark frequency can be calculated as:
• f_S = R_FS[15:0]_dec x f_DDS/2¹⁸
• f_M = R_FM[15:0]_dec x f_DDS/2¹⁸
Or the content of both R_FS[15:0] and R_FM[15:0] are
defined as:
• R_FS[15:0]_dec = Round(2¹⁸ x f_S/f_DDS)
• R_FM[15:0]_dec = Round(2¹⁸ x f_M/f_DDS)
Where f_DDS = 3 MHz is the direct digital synthesizer
clock frequency.
After a hard or soft reset or at the start of the transmission
(when TX_RXB goes from 0 to 1) the phase accumulator
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