|
AMIS-30622_13 Datasheet, PDF (36/50 Pages) ON Semiconductor – I2C Micro-Stepping Motor Driver | |||
|
◁ |
AMISâ30622
General Characteristics
Serial Data Line
Serial Clock Line
Clock IN
SCK
2
Data IN
SDA
1
+5 V
Rp
Rp
Clock IN
SCL
Data IN
SDA
Clock OUT
AMISâ30624,
NCV70624
Data OUT
Clock OUT
Data OUT
MASTER
Figure 22. Connection of a Device to the I2Câbus
Both SDA and SCK are biâdirectional lines connected to
a positive supply voltage via a pullâup resistor (see
Figure 22). When the bus is free both lines are HIGH. The
output stages of the devices connected to the bus must have
an open drain to perform the wiredâAND function. Data on
the I2Câbus can be transferred up to 400 kb/s in fast mode.
The number of interfaces connected to the bus is dependent
on the maximum bus capacitance limit (See CB in Table 6)
and the available number of addresses.
Bit Transfer
The levels for logic â0â (LOW) and â1â (HIGH) are not
fixed in the I2C standard but dependent on the used VDD
level. Using AMISâ30622, the levels are specified in
Table 5. One clock pulse is generated for each data bit
transferred.
Data Validity
The data on the SDA line must be stable during the HIGH
period of the clock. The HIGH or LOW state of the data line
can only change when the clock signal on the SCL line is
LOW (See Figure 23).
SDA
START and STOP Conditions
Within the procedure of the I2Câbus, unique situations
arise, which are defined as START (S) and STOP (P)
conditions (See Figure 24).
A HIGH to LOW transition on the SDA line while SCK
is HIGH is one such unique case. This situation indicates a
START condition. LOW to HIGH transition on the SDA line
while SCK is HIGH defines a STOP condition.
START and STOP conditions are always generated by the
master. The bus is considered to be busy after the START
condition. The bus is considered to be free again a certain
time after the STOP condition. The bus free situation is
specified as tBUF in Table 6.
The bus stays busy if a repeated START (Sr) is generated
instead of a STOP condition. In this respect, the START (S)
and repeated START (Sr) conditions are functionally
identical (See Figure 25). The symbol S will be used to
represent START and repeated START, unless otherwise
noted.
START
SDA
STOP
SCK
Data line stable Change of
â> Data valid data allowed
Figure 23. Bit Transfer on the I2Câbus
SCK
START
condition
STOP
condition
Figure 24. START and STOP Conditions
http://onsemi.com
36
|
▷ |