AMIS-30622_13 Datasheet, PDF (35/50 Pages) ON Semiconductor – I2C Micro-Stepping Motor Driver

AMIS−30622
I²C BUS DESCRIPTION
General Description
AMIS−30622 uses a simple bi−directional 2−wire bus for
efficient inter−ic control. This bus is called the Inter IC or
I²C−bus.
Features include:
• Only two bus lines are required; a serial data line
(SDA) and a serial clock line (SCK).
• Each device connected to the bus is software
addressable by a unique address and simple
master/slave relationships exists at all times; master can
operate as master−transmitter or as master receiver.
• Serial, 8−bit oriented, bi−directional data transfers can
be made up to 400 kb/s.
• On−chip filtering rejects spikes on the bus data line to
preserve data integrity.
• No need to design bus interfaces because I²C−bus
interface is already integrated on−chip.
• IC’s can be added to or removed from a system without
affecting any other circuits on the bus.
Concept
The I²C−bus consists of two wires, serial data (SDA) and
serial clock (SCK), carrying information between the
devices connected on the bus. Each device connected to the
bus is recognized by a unique address and operates as either
a transmitter or receiver, depending on the function of the
device. AMIS−30622 can both receive and transmit data. In
addition to transmitters and receivers, devices can also be
considered as masters or slaves when performing data
transfers. AMIS−30622 is a slave device. See Table 25.
Table 24. DEFINITION OF I²C–BUS TERMINOLOGY
Term
Description
Transmitter
Receiver
Master
The device which sends data on the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a transfer
Slave
Synchronization
The devices addressed by a master
Procedure to synchronizer the clock signals of two or more devices
Micro−
controller
Motordriver_2
AMIS−30622
Motordriver_4
AMIS−30622
SDA
SCL
Motordriver_1
Motordriver_3
AMIS−30622
AMIS−30622
Figure 21. Example of an I²C−bus Configuration Using One Microcontroller and Four Slaves
Figure 21 highlights the master−slave and
receiver−transmitter relationships to be found on the
I²C−bus. It should be noted that these relationships are not
permanent but only depend on the direction of data transfer
at that time. The transfer of data would proceed as follows:
1. Suppose the microcontroller wants to send
information to motordriver_1:
♦ Microcontroller (master) addresses
motordriver_1 (slave)
♦ Microcontroller (master−transmitter) sends data
to motordriver_1 (slave−receiver)
♦ Microcontroller terminates the transfer
2. If the microcontroller wants to receive information
from motordriver_2:
♦ Microcontroller (master) addresses
motordriver_2 (slave)
♦ Microcontroller (master−receiver) receives data
from motordriver_2 (slave−transmitter)
♦ Microcontroller terminates the transfer
Even in this case the master generates the timing and
terminates the transfer.
Generation of the signals on the I²C−bus is always the
responsibility of the master device. It generates its own
clock signal when transferring data on the bus. Bus clock
signals from a master can only be altered when they are
stretched by a slow slave device holding−down the clock
line.
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