AMIS-30523 Datasheet, PDF (31/35 Pages) ON Semiconductor – CAN Micro-Stepping Motor Driver

AMIS−30523
Table 14. SPI CONTROL REGISTERS (All SPI control registers have Read/Write Access and default to ”0” after power−on or
hard reset.)
Structure
Content
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Address
Reset
0
0
0
0
0
0
0
0
WR (00h)
Data
WDEN
WDT[3:0]
−
−
−
CR0 (01h)
Data
SM[2:0]
CUR[4:0]
CR1 (02h)
Data
DIRCTRL
NXTP
−
−
PWMF
PWMJ
EMC[1:0]
CR2 (03h)
Data
MOTEN
SLP
SLAG
SLAT
−
−
−
−
Where:
R/W
Reset:
Read and Write access
Status after power−On or hard reset
Table 15. SPI CONTROL PARAMETER OVERVIEW
Symbol
Description
Status
Value
<DIR> = 0
<DIRCTRL> = 0
CW motion
DIRCTRL
Controls the direction of rotation
(in combination with logic level on input DIR)
<DIR> = 1
<DIRCTRL> = 1
<DIRCTRL> = 0
CCW motion
CCW motion
<DIRCTRL> = 1
CW motion
NXTP
Selects if NXT triggers on rising or falling
edge
<NXTP> = 0
<NXTP> = 1
Trigger on rising edge
Trigger on falling edge
00
Very Fast
EMC[1:0]
Turn On – Turn−off Slopes of motor driver
(Note 18)
01
10
Fast
Slow
11
Very Slow
SLAT
Speed load angle transparency bit
<SLAT> = 0
<SLAT> = 1
SLA is transparent
SLA is NOT transparent
SLAG
Speed load angle gain setting
<SLAG> = 0
<SLAG> = 1
Gain = 0.5
Gain = 0.25
PWMF
Enables doubling of the PWM frequency
(Note 18)
<PWMF> = 0
<PWMF> = 1
Default Frequency
Double Frequency
PWMJ
Enables jittery PWM
<PWMJ> = 0
<PWMJ> = 1
Jitter disabled
Jitter enabled
000
1/32 Micro − Step
001
1/16 Micro − Step
010
1/8 Micro − Step
SM[2:0]
Stepmode
011
1/4 Micro − Step
100
Compensated Half Step
101
Uncompensated Half Step
110
Full Step
111
n.a.
<SLP> = 0
SLP
Enables sleep mode
<SLP> = 1
Active mode
Sleep mode
MOTEN
Activates the motor driver outputs
<MOTEN> = 0
<MOTEN> = 1
Drivers disabled
Drivers enabled
18. The typical values can be found in Table 5: DC Parameters Motor Driver and in Table 6: AC parameters Motor Driver
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