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AMIS-30523 Datasheet, PDF (24/35 Pages) ON Semiconductor – CAN Micro-Stepping Motor Driver | |||
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AMISâ30523
Because of the relatively high recirculation currents in the
coil during current decay, the coil voltage VCOIL shows a
transient behavior. As this transient is not always desired in
application software, two operating modes can be selected
by means of the bit <SLAT> (see âSLAâtransparencyâ in
Table 15 SPI Control Parameter Overview). The SLA pin
shows in âtransparent modeâ full visibility of the voltage
transient behavior. This allows a sanityâcheck of the
speedâsetting versus motor operation and characteristics
and supply voltage levels. If the bit âSLATâ is cleared, then
only the voltage samples at the end of each coil current zero
crossing are visible on the SLAâpin. Because the transient
behavior of the coil voltage is not visible anymore, this mode
generates smoother Back e.m.f. input for postâprocessing,
e.g. by software.
In order to bring the sampled Back e.m.f. to a descent
output level (0 to 5 V), the sampled coil voltage VCOIL is
divided by 2 or by 4. This divider is set through an SPI bit
<SLAG> (see Table 15 SPI Control Parameter Overview).
The following drawing illustrates the operation of the
SLAâpin and the transparencyâbit. âPWMshâ and âIcoil = 0â
are internal signals that define together with SLAT the
sampling and hold moments of the coil voltage.
More information can be found in application note
AND8399/D.
Ssh
VCOIL
div2
div4
Sh
Csh
buf
Ch
SLAâPin
Icoil=0
PWMsh
PWMsh
Icoil=0
SLAT
VCOIL
SLAT
NOT (Icoil=0)
t
SLAâPin
last
sample
is
retained
VBEMF
previous output is
kept at SLA pin
retain last sample
t
SLAT = 1 => SLAâpin is âtransparentâ during
SLAT = 0 => SLAâpin is not âtransparentâ
VBEMF sampling @ Coil Current Zero
Crossing. SLAâpin is updated ârealâtimeâ.
during VBEMF sampling @ Coil Current Zero
Crossing. SLAâpin is updated when leaving
currentâless state.
Figure 21. Timing Diagram of SLAâPin
Warning, Error Detection and Diagnostics Feedback
Thermal Warning and Shutdown
When junction temperature rises above TTW, the thermal
warning bit <TW> is set (Table 17 SPI Status registers
Address SR0). If junction temperature increases above
thermal shutdown level, then the circuit goes in âThermal
Shutdownâ mode (<TSD>) and all driver transistors are
disabled (high impedance) (see Table 17 SPI Status registers
Address SR2). The conditions to reset flag <TSD> is to be
at a temperature lower than TTW and to clear the <TSD> flag
reading out Status Register 2.
OverâCurrent Detection
The overâcurrent detection circuit monitors the load
current in each activated output stage. If the load current
exceeds the overâcurrent detection threshold, then the
overâcurrent flag is set and the drivers are switched off to
reduce the power dissipation and to protect the integrated
circuit. Each driver transistor has an individual detection bit
in (see Table 17 SPI Status registers Address SR1 and SR2:
<OVCXij> and <OVCYij>). Error condition is latched
and the microcontroller needs to clear the status bits (by
reading Status Register 1 or 2) to reactivate the drivers.
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