TCC-206 Datasheet, PDF (27/33 Pages) ON Semiconductor – Six-Output PTIC Control IC

TCC−206
Bits
Reset
7
6
Reserved
U−0
U−0
5
4
TCM_C
W−0
W−0
3
2
TCM_B
W−0
W−0
1
W−0
0
TCM_A
W−0
Register RFFE:
RFFE_REG_0x14
Address RFFE A[4:0]:
0x14
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
7
6
5
4
3
2
1
0
Bits
Reserved
TC_STP_DAC_F
TC_STP_DAC_E
TC_STP_DAC_D
Reset
U−0
U−0
W−0
W−1
W−0
W−1
W−0
W−1
Register RFFE:
RFFE_REG_0x15
Address RFFE A[4:0]:
0x15
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
7
6
5
4
3
2
1
0
Bits
Reserved
TCM_F
TCM_E
TCM_D
Reset
U−0
U−0
W−0
W−0
W−0
W−0
W−0
W−0
Register RFFE:
RFFE_STATUS_0x1A
Address RFFE A[4:0]:
0x1A
Reset Source: nreset_dig or SWR = ‘1’ or PWR_MODE = ‘01’ (transition through STARTUP mode)
7
6
5
4
3
2
1
0
Bits
SWR
CFPE
CLE
AFPE
DFPE
RURE
WURE
BGE
Reset
W−0
R−0
R−0
R−0
R−0
R−0
R−0
R−0
TC_STP_DAC_x[1:0]
00
01 (default)
10
11
Turbo steps for TCDLY [us]
3
5
7
9
TCM_x[1:0]
00 (default)
01
10
11
Turbo Multiplication Factor
4
3
2
1
Step
(ms)
DAC
state
0
1
2
3
4
5
6
7
8
9
10
11
9
TCDLY Turbo OFF
18
27
36
45
54
63
72
81
90
99
7
TCDLY Turbo OFF
14
21
28
35
42
49
56
63
70
77
5
(default)
TCDLY Turbo OFF
10
15
20
25
30
35
40
45
50
55
3
TCDLY Turbo OFF
6
9
12
15
18
21
24
27
30
33
The value of Turbo time is deducted based on the hardware comparison of new DAC value in respect to old DAC value, as
follows:
If DAC new > DAC old, then TUP = TCDLY
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