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TCC-206 Datasheet, PDF (24/33 Pages) ON Semiconductor – Six-Output PTIC Control IC | |||
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TCCâ206
Register RFFE:
RFFE_REG_0x9
Address RFFE A[4:0]:
0x09
Reset Source: nreset_dig or SWR = â1â or PWR_MODE = â01â (transition through STARTUP mode)
Bits
Reset
7
6
HW Wake-Up Polarity
W-0
W-1
5
HW Wakeâ
Up Disable
W-0
4
3
DAC_WAKEUP_CTRL
W-0
W-0
2
Turbo Latency
Select
W-0
1
Reserved
W-0
0
boost_en_fast_st
(OTP duplicated) (2)
W-0
1. Changing RFFE_REG_0x09 bits [7:5] while chip is in LP STD mode does not have effect, until chip
returns to ACTIVE mode because bits [7:5] are shadowed when entering LP STD mode.
2. boost_en_fast_st can be set in ACTIVE or in LP mode
Bit [7:6]: HW WakeâUp Polarity
00: HW WakeâUp is always active LOW
01: (default) HW WakeâUp is always active HIGH
10: HW WakeâUp has inverted polarity referred to TRIG pin:
a. when RFFE_REG_0x11/TRIG_SEL = 1, HW WakeâUp is always active LOW
b. when RFFE_REG_0x11/TRIG_SEL = 0, HW WakeâUp is:
i.
active LOW if RFFE_REG_0x11/TRIG_EDGE = 0 ii.
active HIGH if
RFFE_REG_0x11/TRIG_EDGE = 1
11: HW WakeâUp has same polarity as TRIG pin:
a. when RFFE_REG_0x11/TRIG_SEL = 1, HW WakeâUp is always active HIGH
b. when RFFE_REG_0x11/TRIG_SEL = 0, HW WakeâUp is:
i.
active HIGH if RFFE_REG_0x11/TRIG_EDGE = 0
ii. active LOW if RFFE_REG_0x11/TRIG_EDGE = 1
Bit [5]: HW WakeâUp Disable
0 : (default) HW WakeâUp is enabled
1: HW Wakeâup is disabled
Bit [4:3]: DAC Wakeâup Control applicable to Wakeâup from LP
00: (default) Donât apply Turbo when Wakeâup from LP
01: Always apply Turbo UP when Wakeâup from LP. Turbo UP is calculated based on DAC value
prior to enter
LP STD mode.
10: Apply Turbo UP when Wakeâup from LP when HW Wakeâup is applied, but donât apply Turbo
UP when
SW Wakeâup is applied
11: unused
NOTE 1: Turbo i s NOT appl i ed after Wakeâup to the DACs whi ch are programmed with 0x00 in
the DAC value register
NOTE 2: When Bi t[4:3] = â10â or â01â, then Turbo i s appl i ed after Wakeâup regardl ess if:
â DAC values are updated or not
â l ast DAC val ue update i s equal wi th ol d DAC val ue
NOTE 3: When RFFE_REG_0x31 / Wakeâup DAC Ctrl i s â0â (default) Turbo after WakeâUp i s
appl i ed after fi rst vhv_too_low fal ling edge is detected. When RFFE_REG_0x31 / Wakeâup DAC
Ctrl i s â1â Turbo after Wakeâup i s appl i ed after rc_clk starts.
Bit [2]: Turbo UP latency Select when Wakeâup from LP.
This field has no effect when DAC_WAKEUP_CTRL[1:0] = â00â
0 : (default) Turbo UP latency is 50us
1: Turbo UP latency is 100us
Bit [1]: Fast Transition to Active Mode Enable
0: (default) Slow, current as low as possible in LP mode
1 Fast, RC oscillator and bandgap stay on, refer to section 5.6.2.4.2
Bit [0]: Boost Fast Startup Enable
0: (default) Startup with selected boost_il_trim
1: Startup with boost_il_trim_st[2:0], only if OTP[59]=1. The value of boost_il_trim_st[2:0] is applied
starting from the moment when RFFE_REG_0x1C / Power Mode filed is written â00â during LP mode,
until first vhv_too_low negative edge is detected.
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