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| DAC1008D650 Datasheet, PDF (96/98 Pages) NXP Semiconductors – Dual 10-bit DAC up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A interface | |||
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NXP Semiconductors
DAC1008D650
2Ã, 4Ã or 8Ã interpolating DAC with JESD204A
Table 114. DEC_FLAGS register (address 04h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Table 115. KOUT_FLAG register (address 05h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Table 116. K28_LN0_FLAG register (address 06h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Table 117. K28_LN1_FLAG register (address 07h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Table 118. K28_LN2_FLAG register (address 08h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
Table 119. K28_LN3_FLAG register (address 09h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
Table 120. KOUT_UNEXPECTED_FLAG register (address
0Ah) bit description . . . . . . . . . . . . . . . . . . . . .72
Table 121. LOCK_CNT_MON_LN01 register (address 0Bh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
Table 122. LOCK_CNT_MON_LN23 register (address 0Ch)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
Table 123. CS_STATE_LNX register (address 0Dh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
Table 124. RST_BUF_ERR_FLAGS register (address 0Eh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .72
Table 125. INTR_MISC_ENA register (address 0Fh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 126. FLAG_CNT_LSB_LN0 register (address 10h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 127. FLAG_CNT_MSB_LN0 register (address 11h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 128. FLAG_CNT_LSB_LN1 register (address 12h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 129. FLAG_CNT_MSB_LN1 register (address 13h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 130. FLAG_CNT_LSB_LN2 register (address 14h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 131. FLAG_CNT_MSB_LN2 register (address 15h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 132. FLAG_CNT_LSB_LN3 register (address 16h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .73
Table 133. FLAG_CNT_MSB_LN3 register (address 17h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Table 134. BER_LEVEL_LSB register (address 18h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Table 135. BER_LEVEL_MSB register (address 19h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Table 136. INTR_ENA register (address 1Ah) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Table 137. CNTRL_FLAGCNT_LN01 register (address 1Bh)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .75
Table 138. CNTRL_FLAGCNT_LN23 register (address 1Ch)
bit description . . . . . . . . . . . . . . . . . . . . . . . . .75
Table 139. MON_FLAGS_RESET register (address 1Dh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 140. DBG_CNTRL register (address 1Eh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 141. PAGE_ADDRESS register (address 1Fh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 142. Counter source . . . . . . . . . . . . . . . . . . . . . . . . 76
Table 143. Page 6 register allocation map . . . . . . . . . . . . 77
Table 144. LN0_CFG_0 register (address 00h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 145. LN0_CFG_1 register (address 01h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 146. LN0_CFG_2 register (address 02h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 147. LN0_CFG_3 register (address 03h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 148. LN0_CFG_4 register (address 04h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 149. LN0_CFG_5 register (address 05h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 150. LN0_CFG_6 register (address 06h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 151. LN0_CFG_7 register (address 07h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 152. LN0_CFG_8 register (address 08h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 153. LN0_CFG_9 register (address 09h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 154. LN0_CFG_10 register (address 0Ah) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 155. LN0_CFG_11 register (address 0Bh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 156. LN0_CFG_12 register (address 0Ch) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 157. LN0_CFG_13 register (address 0Dh) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 158. LN1_CFG_0 register (address 10h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 159. LN1_CFG_1 register (address 11h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 160. LN1_CFG_2 register (address 12h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Table 161. LN1_CFG_3 register (address 13h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 162. LN1_CFG_4 register (address 14h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 163. LN1_CFG_5 register (address 15h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 164. LN1_CFG_6 register (address 16h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 165. LN1_CFG_7 register (address 17h) bit
description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
continued >>
DAC1008D650
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 1 October 2010
© NXP B.V. 2010. All rights reserved.
96 of 98
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