DAC1008D650 Datasheet, PDF (84/98 Pages) NXP Semiconductors – Dual 10-bit DAC up to 650 Msps; 2×, 4× or 8× interpolating with JESD204A interface

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Table 173. Page 7 register allocation map …continued
Address Register name R/W Bit definition
Default^[1]
b7
b6
b5
b4
b3
b2
b1
b0
Bin
Hex
28 1Ch LN3_CFG_12
R
LN3_RES2[7:0]
uuuuuuuu 0xuu
29 1Dh LN3_CFG_13
R
LN3_FCHK[7:0]
uuuuuuuu 0xuu
31 1Fh PAGE_ADDRESS R/W
-
-
-
-
-
PAGE[2:0]
00000000 00h
[1] u = undefined at power-up or after reset.