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74HC259-Q100 Datasheet, PDF (8/20 Pages) NXP Semiconductors – 8-bit addressable latch
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NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
10. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 12.
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ[1] Max Min Max
Min
Max
74HC259-Q100
tpd
propagation D to Qn; see Figure 6
[2]
delay
VCC = 2.0 V
- 58 185 -
230
-
280 ns
VCC = 4.5 V
- 21 37
-
46
-
56 ns
VCC = 5.0 V; CL = 15 pF
- 18 -
-
-
-
- ns
VCC = 6.0 V
- 17 31
-
39
-
48 ns
An to Qn; see Figure 7
[2]
VCC = 2.0 V
- 58 185 -
230
-
280 ns
VCC = 4.5 V
- 21 37
-
46
-
56 ns
VCC = 5.0 V; CL = 15 pF
- 17 -
-
-
-
- ns
VCC = 6.0 V
- 17 31
-
39
-
48 ns
LE to Qn; see Figure 8
[2]
VCC = 2.0 V
- 55 170 -
215
-
255 ns
VCC = 4.5 V
- 20 34
-
43
-
51 ns
VCC = 5.0 V; CL = 15 pF
- 17 -
-
-
-
- ns
VCC = 6.0 V
- 16 29
-
37
-
43 ns
tPHL
HIGH to LOW MR to Qn; see Figure 9
propagation
delay
VCC = 2.0 V
VCC = 4.5 V
- 50 155 -
195
-
235 ns
- 18 31
-
39
-
47 ns
VCC = 5.0 V; CL = 15 pF
- 15 -
-
-
-
- ns
VCC = 6.0 V
- 14 26
-
33
-
40 ns
tt
transition time see Figure 8
[3]
VCC = 2.0 V
- 19 75
-
95
-
119 ns
VCC = 4.5 V
-
7 15
-
19
-
22 ns
VCC = 6.0 V
-
6 13
-
16
-
19 ns
tW
pulse width LE HIGH or LOW;
see Figure 8
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
MR LOW; see Figure 9
70 17 -
90
-
105
- ns
14 6
-
18
-
21
- ns
12 5
-
15
-
18
- ns
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
70 17 -
90
-
105
- ns
14 6
-
18
-
21
- ns
12 5
-
15
-
18
- ns
74HC_HCT259_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 30 July 2012
© NXP B.V. 2012. All rights reserved.
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