74HC259-Q100 Datasheet, PDF (12/20 Pages) NXP Semiconductors – 8-bit addressable latch

NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
V_CC
LE input
GND
V_CC
D input
GND
V_M
t_su
t_h
V_M
t_su
t_h
V_OH
Qn output
Q=D
V_M
V_OL
Q=D
001aah125
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Fig 10. Data input to latch enable input set-up and hold times
V_CC
An input
GND
V_CC
LE input
GND
V_M ADDRESS STABLE
t_su
t_h
V_M
001aah126
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output performance.
V_OL and V_OH are typical voltage output levels that occur with the output load.
Fig 11. Address input to latch enable input set-up and hold times
Table 9. Measurement points
Type
Input
74HC259-Q100
74HCT259-Q100
V_M
0.5V_CC
1.3 V
Output
V_M
0.5V_CC
1.3 V
V_X
0.1V_CC
0.1V_CC
V_Y
0.9V_CC
0.9V_CC
74HC_HCT259_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 30 July 2012
© NXP B.V. 2012. All rights reserved.
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