74HC259-Q100 Datasheet, PDF (2/20 Pages) NXP Semiconductors – 8-bit addressable latch

NXP Semiconductors
74HC259-Q100; 74HCT259-Q100
8-bit addressable latch
 Useful as a 3-to-8 active HIGH decoder
 Input levels:
 For 74HC259-Q100: CMOS level
 For 74HCT259-Q100: TTL level
 ESD protection:
 MIL-STD-883, method 3015 exceeds 2000 V
 HBM JESD22-A114F exceeds 2000 V
 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
 Multiple package options
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature
range
74HC259D-Q100 40 C to +125 C
74HCT259D-Q100
74HC259PW-Q100 40 C to +125 C
74HCT259PW-Q100
74HC259BQ-Q100 40 C to +125 C
74HCT259BQ-Q100
Name
Description
Version
SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1
body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal enhanced very SOT763-1
thin quad flat package; no leads; 16 terminals;
body 2.5  3.5  0.85 mm
4. Functional diagram
14
LE
Q0 ⁴
13 _D
Q1 ⁵
Q2 ⁶
7
Q3
1 _A0
9
Q4
2 _A1
Q5 ¹⁰
3 _A2
11
Q6
12
Q7
MR
15 mna573
Fig 1. Logic symbol
13
Z9
15
G8
14
G10
DX
9,10D
4
1
0
1
C10
8R
0
2
3
G
0
7
1
2
5
6
2
7
3
9
4
10
5
11
6
12
7
mna572
Fig 2. IEC logic symbol
74HC_HCT259_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 30 July 2012
© NXP B.V. 2012. All rights reserved.
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