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| PSMN013-30LL Datasheet, PDF (4/13 Pages) NXP Semiconductors – N-channel 30 V 13 mΩ logic level MOSFET | |||
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PSMN013-30LL NXP Semiconductors
Table 6.
Symbol
RDSon
Characteristics â¦continued
Parameter
Conditions
drain-source on-state VGS = 10 V;
resistance
Figure 10
VGS = 10 V;
Figure 10
VGS = 10 V;
ID
ID
ID
=
=
=
7.5
7.5
7.5
A;
A;
A;
Tj
Tj
Tj
=
=
=
N-channel
100 °C; see
150 °C; see
25 °C; see
30D---MRVAinF1T3DmRADâ¦T-11FR1y9TAp.l8oDFTRgADicFRTDA12M1lDeRF337aTRAv..4x9AFDeTFRlTADMDFRTOmmmURDAARFDnSâ¦â¦â¦TFARiFtTFADTEDFRTRDATARDFTFDARTRFADTADFRTFRDATADRF
Figure 11
RG
internal gate resistance f = 1 MHz
(AC)
-
1.37 -
â¦
Dynamic characteristics
QG(tot)
total gate charge
ID = 8 A; VDS = 15 V; VGS = 10 V; see
Figure 12 and 13
-
12.2 -
nC
QGS
QGS(th)
gate-source charge
pre-threshold
gate-source charge
ID = 0 A; VDS = 0 V; VGS = 10 V
ID = 8 A; VDS = 15 V; VGS = 10 V; see
Figure 12
-
11.4 -
nC
-
2.3 -
nC
-
1.3 -
nC
QGS(th-pl) post-threshold
gate-source charge
-
1
-
nC
QGD
gate-drain charge
ID = 8 A; VDS = 15 V; VGS = 10 V; see
Figure 12 and 13
-
1.7 -
nC
VGS(pl)
gate-source plateau
voltage
ID = 8 A; VDS = 15 V; see Figure 12 and 13
-
2.7 -
V
Ciss
input capacitance
VDS = 15 V; VGS = 0 V; f = 1 MHz;
Coss
output capacitance
Tj = 25 °C; see Figure 14
Crss
reverse transfer
capacitance
-
768 -
pF
-
144 -
pF
-
67
-
pF
td(on)
turn-on delay time
tr
rise time
td(off)
turn-off delay time
tf
fall time
Source-drain diode
VDS = 15 V; RL = 2 â¦; VGS = 10 V;
RG(ext) = 4.7 â¦; Tj = 25 °C
-
13
-
ns
-
9
-
ns
-
15
-
ns
-
5.1 -
ns
VSD
source-drain voltage IS = 7.5 A; VGS = 0 V; Tj = 25 °C; see
Figure 15
-
0.85 1.2 V
trr
reverse recovery time IS = 8 A; dIS/dt = 100 A/µs; VGS = 0 V;
Qr
recovered charge
VDS = 15 V
-
20.7 -
ns
-
10.6 -
nC
PSMN013-30LL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 â 18 February 2010
© NXP B.V. 2010. All rights reserved.
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