PSMN013-30LL Datasheet, PDF (2/13 Pages) NXP Semiconductors – N-channel 30 V 13 mΩ logic level MOSFET

NXP Semiconductors
2. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1
S
source
2
S
source
3
S
source
4
G
gate
5,6,7,8 D
mounting base; connected to
drain
3. Ordering information
PSMN013-30LL _Simplified
N-channel
outline
8765
30DRVAF1_G^T3_r^D_amR_p^ADΩ_h^FR_iTA_cloDF_s^TRg_yADimcFRT_b^DAlDeRF_oTRAv_{Dl AFDeTFRlTADMDFRTORDAARFDSTFARFTFADTEDFRTRDATARDFTFDARTRFADTADFRTFRDATADRF}
G
1234
Transparent
top view
SOT873-1 (HVSON8)
mbb076 S
Table 3. Ordering information
Type number
Package
Name
Description
PSMN013-30LL HVSON8
plastic thermal enhanced very thin small outline package; no leads; 8
terminals; body 3.3 x 3.3 x 0.85 mm
4. Limiting values
Version
SOT873-1
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
V_DS
V_DGR
V_GS
I_D
I_DM
P_tot
T_stg
T_j
T_sld(M)
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering
temperature
T_j ≥ 25 °C; T_j ≤ 150 °C
T_j ≤ 150 °C; T_j ≥ 25 °C; R_GS = 20 kΩ
V_GS = 10 V; T_mb = 100 °C; see Figure 1
V_GS = 10 V; T_mb = 25 °C; see Figure 1
t_p ≤ 10 µs; pulsed; T_mb = 25 °C
T_mb = 25 °C; see Figure 2
Source-drain diode
I_S
source current
I_SM
peak source current
Avalanche ruggedness
T_mb = 25 °C
t_p ≤ 10 µs; pulsed; T_mb = 25 °C
E_DS(AL)S
non-repetitive
V_GS = 10 V; T_j(init) = 25 °C; I_D = 40 A; V_sup ≤ 30 V;
drain-source avalanche unclamped; R_GS = 50 Ω
energy
Min Max Unit
-
30
V
-
30
V
-20 20
V
-
21
A
-
21
A
-
169 A
-
41
W
-55 150 °C
-55 150 °C
-
260 °C
-
42
A
-
169 A
-
13
mJ
PSMN013-30LL_1
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 18 February 2010
© NXP B.V. 2010. All rights reserved.
2 of 13