GTL2010 Datasheet, PDF (13/20 Pages) NXP Semiconductors – 10-bit GTL Processor Voltage Clamp

NXP Semiconductors
14. Package outline
GTL2010
10-bit bidirectional low voltage translator
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
D
y
Z
24
pin 1 index
1
e
E
A
X
c
H_E
vM A
13
12
wM
b_p
A₂
A₁
Q
(A ₃)
A
θ
L_p
L
detail X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A₁
A₂
A₃
b_p
c
D⁽¹⁾ E⁽²⁾
e
H_E
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT355-1
MO-153
L
L_p
Q
v
w
y
Z ⁽¹⁾ θ
1
0.75 0.4
0.50 0.3
0.2 0.13 0.1
0.5
0.2
8^o
0^o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 11. Package outline SOT355-1 (TSSOP24)
GTL2010_6
Product data sheet
Rev. 06 — 3 March 2008
© NXP B.V. 2008. All rights reserved.
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