M36L0R7060T1 Datasheet, PDF (13/22 Pages) STMicroelectronics – 128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package

M36L0R7060T1, M36L0R7060B1
3
Functional description
Functional description
The PSRAM and Flash memory components have separate power supplies but share the
same grounds. They are distinguished by two Chip Enable inputs: E_F for the Flash memory
and E_P for the PSRAM.
Recommended operating conditions do not allow more than one device to be active at a
time. The most common example is simultaneous read operations on one of the Flash
memory and the PSRAM components which would result in a data bus contention.
Therefore it is recommended to put the other devices in the high impedance state when
reading the selected device.
Figure 3. Functional block diagram
A0-A21
A22
E_F
W_F
RP_F
WP_F
G_F
128 Mbit
Flash
Memory
K
V_{DDF VDDQF VPPF}
L
V_CCP
V_SS
E_P
G_P
W_P
CR_P
UB_P
LB_P
64 Mbit
PSRAM
WAIT
DQ0-DQ15
AI12024
13/22